4-

30

CONFIGURATION REGISTER 14 ADDRESS (38h) ED OR RSSI THRESHOLD

Bit 7:6

R/W, But Not Used Internally

Bits 5:0

This register contains the value for the RSSI threshold for measuring and generating energy detect (ED). When the RSSI

exceeds the threshold ED is declared. ED indicates the presence of energy in the channel.

To disable the ED signal so that it has no affect on the CCA logic, the threshold must be set to a 3Fh (all ones).

MSB

LSB

Bits (0:5)

5 4 3 2 1 0

0 0 0 0 0 0

00h (Min)

RSSI_STAT

1 1 1 1 1 1

3Fh (Max)

CONFIGURATION REGISTER 15 ADDRESS (3Ch) SFD TIMER

Bits 7:0

This register is programmed with an 8-bit value which represents the length of time for the demodulator to search for a SFD

in a receive Header. Each bit increment represents 1 symbol period. Failure to find the SFD will result in a return to

acquisition mode.

CONFIGURATION REGISTER 16 ADDRESS (40h) SIGNAL FIELD DBPSK

Bits 7:0

This register contains an 8-bit value defining the data packet modulation as DBPSK. This value will be a OAH for 802.11,

and is used in the transmitted Signalling Field of the header. This value will also be used for detecting the modulation type

on the received Header.

CONFIGURATION REGISTER 17 ADDRESS (44h) SIGNAL FIELD DQPSK

Bits 7:0

This register contains the 8-bit value defining the data packet modulation as DQPSK. This value will be a 14h for full protocol

operation at a data rate of 2 Mbps and is used in the transmitted Signalling Field of the header. This value will also be used

for detecting the modulation type on the received header.

CONFIGURATION REGISTER 18 ADDRESS (48h) SIGNAL FIELD BMBOK

Bits 7:0

This register contains the 8-bit value defining the data packet modulation as BMBOK. This value will be a 37h for operation

at a data rate of 5.5 Mbps and is used in the transmitted Signalling Field of the header. This value will also be used for

detecting the modulation type on the received header.

CONFIGURATION REGISTER 19 ADDRESS (4Ch) SIGNAL FIELD QMBOK

Bits 7:0

This register contains the 8-bit value defining the data packet modulation as QMBOK. This value will be a 6Eh for operation

at a data rate of 11 Mbps and is used in the transmitted Signalling Field of the header. This value will also be used for

detecting the modulation type on the received header.

CONFIGURATION REGISTER 20 ADDRESS (50h) TX SIGNAL FIELD

Bits 7:2

R/W, But Not Used Internally

Bits 1:0

TX data Rate. must be set at least 2

µs before needed in TX frame. This selects TX signal field code from the registers above.

00 = DBPSK - 11 chip sequence (1 Mbps)

01 = DQPSK - 11 chip sequence (2 Mbps)

10 = BMBOK - modified 8 chip Walsh sequence (5.5 Mbps)

11 = QMBOK - modified 8 chip Walsh sequence (11 Mbps)

CONFIGURATION REGISTER 21 ADDRESS (54h) TX SERVICE FIELD

Bits 7:0

This 8-bit register is programmed with the 8-bit value of the Service field to be transmitted in the Header. This field is reserved

for future use and should always be set to 00h.

HFA3860