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HFA3841 Datasheet(PDF) 25 Page - Intersil Corporation

Part No. HFA3841
Description  Wireless LAN Medium Access Controller
Download  27 Pages
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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HFA3841 Datasheet(HTML) 25 Page - Intersil Corporation

 
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25
PE1 and PE2 encoding details are found in Table 5.
Note that during normal receive and transmit operation that
PE1 is static and PE2 toggles for receive and transmit
states.
FIGURE 24. TRANSMIT CONTROL SIGNAL SEQUENCING
PE1
PE2
TR_SW
TR_SW_BAR
TX_PE
TX_RDY
PA_PE
tD1
tD2
tD5
tD3
tD4
TABLE 4. TRANSMIT CONTROL TIMING SPECIFICATIONS
PARAMETER
SYMBOL
DELAY
TOLERANCE UNITS
PE2 to TR Switch
tD1
2
±0.1
µs
PE2 to BBP TX_PE
tD2
TBD
±0.1
µs
PE2 to PA_PE
tD3
3
±0.1
µs
PA_PE to PE2
tD4
3
±0.1
µs
TR Switch to PE2
tD5
2
±0.1
µs
TABLE 5. POWER ENABLE STATES
PE1
PE2
PLL_PE
Power Down State
0
0
1
Receive State
1
1
1
Transmit State
1
0
1
PLL Active State
0
1
1
PLL Disable State
X
X
0
NOTE: PLL_PE is controlled via the serial interface, and can be
used to disable the internal synthesizer, the actual synthesizer con-
trol is an AND function of PLL_PE, and a result of the OR function of
PE1 and PE2. PE1 and PE2 will directly control the power enable
functionality of the LO buffer(s)/phase shifter.
Preliminary - HFA3841


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