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HFA3841 Datasheet(PDF) 23 Page - Intersil Corporation

Part No. HFA3841
Description  Wireless LAN Medium Access Controller
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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HFA3841 Datasheet(HTML) 23 Page - Intersil Corporation

 
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23
BBP Packet Transmission
There are 4 signals associated with the BBP Transmit Port:
TX_PE (transmit enable), TXRDY (transmit ready), TXD
(transmit data), and TXCLK (transmit clock). These connect
to the HFA3841 on PL0, PL7, TXD, and TXC, respectively.
State machines within the BBP control packet transmission
and reception. In the case of a transmission, the MAC
signals the BBP with the signal TX_PE. The BBP forms the
preamble and header and then signals the MAC to begin
transferring data with the signal TXRDY. This sequence is
illustrated in Figure 22 with detailed signal timing shown in
Figure 23 and specified delays contained in Table 3. Note
that if the MAC deactivates TX_PE too early it may cut off
modulation of the final symbol. For this reason, when
TX_PE is de-asserted the BBP will hold TXRDY active until
the last symbol containing data is modulated. This is
important for power sequencing and is discussed in more
detail in that section.
For more detailed information concerning BBP packet
transmission see the HFA3861 data sheet.
TABLE 2. BBP RECEIVE PORT AC ELECTRICAL
SPECIFICATIONS
PARAMETER
SYMBOL
MIN
MAX
UNITS
RX_PE Inactive Width
tRLP
70
-
ns (Note 13)
RXC Period (11MBps
Mode)
tRCP
77
-
ns
RXC Width Hi or Low
(11MBps Mode)
tRCD
31
-
ns
RXC to RXD
tRDD
20
60
ns
MD_RDY to 1st RXC
tRD1
940
-
ns (Note 14)
RXD to 1st RXC
tRD!
940
-
ns
Setup RXD to RXC
tRDS
31
-
ns
RXC to RX_PE
Inactive (1MBps)
tREH
0
925
ns (Note 15)
RXC to RX_PE
Inactive (2MBps)
tREH
0
380
ns (Note 15)
RXC to RX_PE
Inactive (5.5MBps)
tREH
0
140
ns (Note 15)
RXC to RX_PE
Inactive (11MBps)
tREH
0
50
ns (Note 15)
RX_PE inactive to
MD_RDY Inactive
tRD2
5
30
ns (Note 16)
Last Chip of SFD in to
MD_RDY Active
tRD3
2.77
2.86
µs (Note 14)
RX Delay
2.77
2.86
µs (Note 17)
RX_PE to CCA Valid
tCCA
-10
µs (Note 18)
RX_PE to RSSI Valid
tCCA
-10
µs (Note 18)
NOTES:
13. RX_PE must be inactive at least 3 MCLKs before going active to
start a new CCA or acquisition.
14. MD_RDY programmed to go active after SFD detect (measured
from IIN, QIN).
15. RX_PE active to inactive delay to prevent next RXC.
16. Assumes RX_PE inactive after last RXC.
17. MD_RDY programmed to go active at MPDU start. Measured
from first chip of first MPDU symbol at IIN, QIN to MD_RDY
active.
18. CCA and RSSI are measured once during the first 10
µs interval
following RX_PE going active. RX_PE must be pulsed to initiate
a new measurement. RSSI may be read via serial port or from
Test Bus.
TABLE 3. BBP TRANSMIT PORT AC ELECTRICAL
SPECIFICATIONS
PARAMETER
SYMBOL
MIN
MAX
UNITS
TX_PE to IOUT/QOUT
(1st Valid Chip)
tD1
2.18
2.3
µs (Note 19)
TX_PE Inactive Width
tTLP
2.22
-
µs (Note 20)
TXC Width Hi or Low
tTCD
40
-
ns
TXRDY Active to 1st
TX_CLK Hi
tRC
260
-
ns
Setup TXD to TXC Hi
tTDS
30
-
ns
Hold TXD to TXC Hi
tTDH
0-
ns
TXC to TX_PE
Inactive (1MBps)
tPEH
0
965
ns (Note 22)
TXC to TX_PE
Inactive (2MBps)
tPEH
0
420
ns (Note 22)
TXC to TX_PE
Inactive (5.5MBps)
tPEH
0
160
ns (Note 22)
TXC to TX_PE
Inactive (11MBps)
tPEH
0
65
ns (Note 22)
TXRDY Inactive To
Last Chip of MPDU
Out
tRI
-20
20
ns
TXD Modulation
Extension
tME
2-
µs (Note 21)
NOTES:
19. IOUT/QOUT are modulated before first valid chip of preamble is
output to provide ramp up time for RF/IF circuits.
20. TX_PE must be inactive before going active to generate a new
packet.
21. IOUT/QOUT are modulated after last chip of valid data to provide
ramp down time for RF/IF circuits.
22. Delay from TXC to inactive edge of TXPE to prevent next TXC.
Because TXPE asynchronously stops TXC, TXPE going inactive
within 40ns of TXC will cause TXC minimum hi time to be less
than 40ns.
Preliminary - HFA3841


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