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HFA3841 Datasheet(PDF) 4 Page - Intersil Corporation

Part No. HFA3841
Description  Wireless LAN Medium Access Controller
Download  27 Pages
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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HFA3841 Datasheet(HTML) 4 Page - Intersil Corporation

 
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4
Radio Interface and General Purpose Port Pins
PIN NAME
PIN NUMBER
PIN I/O TYPE
DESCRIPTION OF FUNCTION
(IF OTHER THAN IO PORT)
TXD
17
CMOS Output, 2mA, 50K Pull Down
Transmit data out
TXC
18
5V tol, CMOS, BiDir 2mA, ST
Transmit clock in/out
RXD
19
CMOS Input
Receive data in
RXC
20
CMOS Input, ST
Receive clock in
PJ0
31
CMOS BiDir, 2mA, ST, 50K Pull Down
MMI serial clock in/out
PJ1
30
CMOS BiDir, 2mA, 50K Pull Down
MMI serial data in/out
PJ2
32
CMOS BiDir, 2mA, 50K Pull Down
MMI serial data read/write control, or data output
PJ3
29
CMOS BiDir, 2mA
MMI device enable
PJ4
65
CMOS BiDir, 2mA
PJ5
8
CMOS BiDir, 2mA, 50K Pull Up
PJ6
7
CMOS BiDir, 2mA
PJ7
9
CMOS BiDir, 2mA, 50K Pull Up
PK0
35
CMOS BiDir, 2mA, ST, 50K Pull Down
PK1
34
CMOS BiDir, 2mA, 50K Pull Down
PK2
33
CMOS BiDir, 2mA, 50K Pull Down
PK3
63
CMOS BiDir, 2mA
PK4
64
CMOS BiDir, 2mA
PK5
21
CMOS BiDir, 2mA
MDREADY - PHY or MAC data available (in)
PK6
22
CMOS BiDir, 2mA
Medium busy (CCA from PHY)
PK7
23
CMOS BiDir, 2mA
PL0
15
CMOS BiDir, 2mA
Transmitter enable
PL1
27
CMOS BiDir, 2mA
Receiver enable (or PHY sleep control)
PL2
26
CMOS BiDir, 2mA
PL3
28
CMOS BiDir, 2mA
PL4
43
CMOS BiDir, 2mA
MBUS address bit 19
PL5
12
CMOS BiDir, 2mA, 50K Pull Up MBUS address bit
20
PL6
11
CMOS BiDir, 2mA
MBUS address bit 21 or PHY control I/O
PL7
93
CMOS BiDir, 2mA
Transmitter ready
Clocks
PIN NAME
PIN NUMBER
PIN I/O TYPE
DESCRIPTION
XTALI
40
CMOS Input, ST
Crystal or external clock input (at >= 2X desired
MCLK frequency)
XTALO
41
CMOS Output, 2mA
Crystal output
CLKOUT
38
CMOS, TS Output, 2mA
Clock output (selectable as OSC or MCLK)
TCLKIN
10
CMOS Input, ST, 50K Pull Down
Timebase Reference Clock Input
Preliminary - HFA3841


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