1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

HCTS273DMSR

Intersil Class S Equivalent

20 Lead SBDIP

HCTS273KMSR

Intersil Class S Equivalent

20 Lead Ceramic Flatpack

HCTS273D/Sample

Sample

20 Lead SBDIP

HCTS273K/Sample

Sample

20 Lead Ceramic Flatpack

HCTS273HMSR

Die

Die

HCTS273MS

Radiation Hardened

Octal D Flip-Flop

Pinouts

20 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T20, LEAD FINISH C

TOP VIEW

20 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP4-F20, LEAD FINISH C

TOP VIEW

11

12

13

14

15

16

17

18

20

19

10

9

8

7

6

5

4

3

2

1

MR

Q0

D0

D1

Q1

Q2

D3

D2

Q3

GND

VCC

D7

D6

Q6

Q7

Q5

D5

D4

Q4

CP

2

3

4

5

6

7

8

120

19

18

17

16

15

14

13

MR

Q0

D0

D1

Q1

Q2

D2

D3

9

10

12

11

Q3

GND

VCC

Q7

D7

D6

Q6

Q5

D5

D4

Q4

CP

Features

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K RAD (Si)

Day (Typ)

• Latch-Up Free Under Any Conditions

• Fanout (Over Temperature Range)

- Bus Driver Outputs - 15 LSTTL Loads

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Compatibility

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current Levels Ii

≤ 5µA at VOL, VOH

Description

The Intersil HCTS273MS is a Radiation Hardened octal D flip-

flop, positive edge triggered, with reset.

The HCTS273MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCTS273MS is supplied in a 20 lead Ceramic flatpack

(K suffix) or a SBDIP Package (D suffix).

September 1995

Spec Number

518642

File Number

2274.2