4-89

Power Dissipation

The power dissipation during ringing is dictated by the load

driving requirements and the ringing waveform. The key to

valid power calculations is the correct definition of average

and rms currents. The average current defines the high

battery supply current. The rms current defines the load

current.

The cadence provides a time averaging reduction in the

peak power. The total power dissipation consists of ringing

The terms, tr and ts, represent the cadence. The ringing

interval is tr and the silent interval is ts. The typical cadence

ratio tr:ts is 1:2.

The quiescent power of the device in the ringing mode is

defined in Equation 34.

During ringing, the device is operated from the low battery,

therefore the VBH power contribution is negligible. The total

power during the ringing interval is the sum of the quiescent

power and loading power:

defined in equation 36.

The only amplifier providing load current during ringing is the

Tip amplifier. Therefore the total power contribution from the

device is half the average power required by the load.

The silent interval power dissipation will be determined by

the quiescent power of the selected operating mode.

Power Denial

Overview

The power denial mode (111) will shutdown the entire device

except for the logic interface. Loop supervision is not

provided. This mode may be used as a sleep mode or to

shutdown in the presence of a persistent thermal alarm.

Switching between high and low battery will have no effect

during power denial.

Functionality

During power denial, both the Tip and Ring amplifiers are

disabled, representing high impedances. The voltages at

both outputs are near ground.

Thermal Shutdown

In the event the safe die temperature is exceeded, the ALM

output will go low and DET will go high and the part will

automatically shut down. When the device cools, ALM will go

high and DET will reflect the loop status. If the thermal fault

persists, ALM will go low again and the part will shutdown.

Programming power denial will permanently shutdown the

device and stop the self cooling cycling.

Battery Switching

Overview

The integrated battery switch selects between the high

battery (VBH) and low battery (VBL). The battery switch is

controlled with the logic input BSEL. When BSEL is a logic

high, the high battery is selected and when a logic low, the

low battery is selected. All operating modes of the device will

operate from high or low battery except forward loop back.

Functionality

The logic control is independent of the operating mode

decode. Independent logic control provides the most

flexibility and will support all application configurations.

When changing device operating states, battery switching

should occur simultaneously with or prior to changing the

operating mode. In most cases, this will minimize overall

power dissipation and prevent glitches on the DET output.

The only external component required to support the battery

switch is a diode in series with the VBH supply lead. In the

event that high battery is removed, the diode allows the

device to transition to low battery operation.

Low Battery Operation

All off hook operating conditions and ringing should use the

low battery. The prime benefit will be reduced power

dissipation. The typical low battery for the device is -24V.

However this may be increased to support longer loop

lengths or high loop current requirements. Standby

conditions may also operate from the low battery if MTU

compliance is not required, further reducing standby power

dissipation.

High Battery Operation

The high battery should be used for standby conditions

which must provide MTU compliance. During standby

operation the power consumption is typically 40 mW with -

48V battery. If standby requirements do not require high

battery operation, then a lower battery will result in lower

standby power.

P

RNG

P

r

t

r

t

r

t

s

+

--------------

⋅

P

s

t

s

t

r

t

s

+

--------------

⋅

+

=

(EQ. 32)

P

rQ

()

VBH

IBH

Q

⋅

VBL

IBL

Q

⋅

VCC

ICC

Q

⋅

++

=

(EQ. 33)

P

r

P

rQ

⋅

V

rms

2

Z

REN

R

LOOP

+

------------------------------------------

–

+

=

(EQ. 34)

I

AVG

2

π

---





V

rms

2

⋅

Z

REN

R

LOOP

+

------------------------------------------

=

(EQ. 35)

I

AVG

1

π

---





V

rms

2

⋅

Z

REN

R

LOOP

+

------------------------------------------

=

(EQ. 36)

HC5549