68

Impedance Matching

Impedance matching is used to match the AC source imped-

ance of the SLIC to the AC source impedance of the load.

When the impedance is matched, the voltage level at the

receive input of the SLIC will be the same voltage level that is at

the 2-wire differential output (i.e., Tip and Ring). Impedance

matching applies only to the 2-wire interface, not the 4-wire

interface.

Slic AC signal power levels are most commonly assigned the

units dBmO. The term dBmO refers to milliwatts in a 600

Ω

load. The typical AC power level is 0dBmO which is 1mW

referenced to a 600

Ω load. The relationship between dBmO

Substituting 0dBmO into the equation should result in

voltage by 1.414 to obtain the peak sinusoidal voltage.

The SLIC impedance matching is achieved by applying a feed

back loop from the transmit output of the SLIC to the receive

input of the SLIC. The transmit output voltage of the HC55171

is proportional to the loop current (DC + AC) flowing in the sub-

scriber loop. The impedance matching feedback only uses the

AC portion of the transmit output voltage. Applying a voltage

gain to the feedback term and injecting it into the receive signal

path, will cause the SLIC to “synthesize” a source impedance

that is nonzero. Recall that the impedance matching sets the

SLIC source impedance equal to the load impedance.

The SLIC application circuit requires external sense resistors

in the Tip and Ring signal paths to achieve the differential

receive function. The sense resistors contribute to the source

impedance of the SLIC and are accounted for in the design

equations. Specifically, if the load impedance is 600

Ω and

each sense resistor is 50

Ω, the SLIC must synthesize an

additional source impedance of 500

Ω (i.e., 600Ω - 2(50Ω)).

In addition to the sense resistors, some applications may use a

protection resistor in each of the Tip and Ring leads as part of a

surge protection network. These resistors also contribute to the

SLIC source impedance and can be easily accounted for in the

design equations. If 50

Ω protection resistors are added to the

prior example, the SLIC would then have to synthesize 400

Ω to

match the load (i.e., 600

Ω - 2(50Ω) - 2(50Ω)). A diagram

showing the impedance terms is shown in Figure 4.

Loop Supervision

The SLIC must detect when the subscriber picks up the

handset when the SLIC is not ringing the phone and when

the SLIC is ringing the phone. The HC55171 uses a switch

hook detector output to indicate loop closure when the SLIC

is not ringing the phone. When the SLIC is ringing the

phone, loop closure is indicated by the ring trip detector.

(Recall from earlier discussions that the subscriber loop is

open when the handset is on hook and closed when off

hook. The DC impedance of the handset when off hook is

typically 400

Ω.)

When the handset is off hook, DC loop current flows from

Tip to Ring and the transmit output voltage increases to a

negative value. In addition to interfacing to the CODEC and

providing the feedback for impedance matching, the transmit

output also drives the input to a voltage comparator. When

the comparator threshold is exceeded, the SHD output goes

to a logic low, indicating the handset is off hook. When the

call is terminated and the handset is returned on hook, the

transmit voltage decreases to zero, crossing the comparator

threshold and setting SHD to a logic high.

Loop closure must also be detected when the SLIC is ringing

the handset. The balanced ringing output of the SLIC coin-

cides with a zero DC potential between Tip and Ring. There-

fore the ring trip must be designed around an AC only

waveform at the transmit output. When the SLIC is ringing

and the handset is on hook, the echo of the ringing signal is

at the transmit output. When the handset goes off hook, the

amplitude of the ringing echo increases. The increase in

amplitude is detected by an envelope detector. When the

echo increases, the envelope detector output increases and

exceeds the ring trip comparator threshold. Then RTD goes

to a logic low, indicating the handset is off hook. When the

system controller detects a logic low on RTD, the ringing is

turned off and the Tip and Ring terminals return to their

typical negative DC potentials.

Design Equations and Operational Theory

The following discussion separates the SLICS’s operation

into its DC and AC path, then follows up with additional cir-

cuit design and application information.

FIGURE 3. COMPLETE VOICE SIGNAL PATH

FIGURE 4. SLIC IMPEDANCE DIAGRAM

TIP

RX

TX

RING

OUT

IN

OUT1

PCM

IN

PCM

OUT

SLIC

ANALOG

DIGITAL

CODEC

-1

TIP

RING

RSYNTH

RSYNTH

RS

RP

RS

RP

SLIC SOURCE IMPEDANCE

LOAD IMPEDANCE

dBmO

10

1000

V

RMS

()

2

600

------------------------

⋅







log

⋅

=

(EQ. 2)

HC55171