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AD8113 Datasheet(PDF) 4 Page - Analog Devices |
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AD8113 Datasheet(HTML) 4 Page - Analog Devices |
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4 / 29 page  REV. A –3– AD8113 Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE Supply Voltage Range AVCC 4.5 12.6 V AVEE –12.6 –4.5 V DVCC 4.5 5.5 V PSRR DC 75 80 dB f = 100 kHz 60 dB f = 1 MHz 40 dB OPERATING TEMPERATURE RANGE Temperature Range Operating (Still Air) 0 to 70 °C θ JA Operating (Still Air) 40 °C/W Specifications subject to change without notice. TIMING CHARACTERISTICS (Serial) Limit Parameter Symbol Min Typ Max Unit Serial Data Setup Time t 1 20 ns CLK Pulsewidth t2 100 ns Serial Data Hold Time t3 20 ns CLK Pulse Separation, Serial Mode t4 100 ns CLK to UPDATE Delay t5 0ns UPDATE Pulsewidth t6 50 ns CLK to DATA OUT Valid, Serial Mode t7 200 ns Propagation Delay, UPDATE to Switch On or Off 50 ns Data Load Time, CLK = 5 MHz, Serial Mode 16 µs CLK, UPDATE Rise and Fall Times 100 ns RESET Time 200 ns Specifications subject to change without notice. Table I. Logic Levels VIH VIL VOH VOL IIH IIL IOH IOL RESET, SER/PAR RESET, SER/PAR RESET, SER/PAR RESET, SER/PAR CLK, DATA IN, CLK, DATA IN, CLK, DATA IN, CLK, DATA IN, CE, UPDATE CE, UPDATE DATA OUT DATA OUT CE, UPDATE CE, UPDATE DATA OUT DATA OUT 2.0 V min 0.8 V max 2.7 V min 0.5 V max 20 µA max –400 µA min –400 µA max 3.0 mA min 1 0 1 0 1 = LATCHED 0 = TRANSPARENT DATA OUT CLK DATA IN OUT7 (D4) OUT7 (D3) OUT00 (D0) LOAD DATA INTO SERIAL REGISTER ON FALLING EDGE TRANSFER DATA FROM SERIAL REGISTER TO PARALLEL LATCHES DURING LOW LEVEL t2 t4 t1 t3 t7 t5 t6 UPDATE Figure 1. Timing Diagram, Serial Mode |
Similar Part No. - AD8113_15 |
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Similar Description - AD8113_15 |
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