4

CONTROL WORD

FREQUENCY WORD

CURVES

CONTINUED

IMMEDIATELY

BELOW

CURVES

CONTINUED

BELOW

BIT 3

= 0

BIT 4

= 0

BIT 5

= 0

BIT 6

= 0

BIT 7

= 0

CLOCK

DIVIDE

PWR

COUNT

DON’T

CARE

3

4

5

6

7

0

1

2

3

4

5

6

7

= 0

= 0

= 0

DON’T

CARE

= 0

DON’T

CARE

= 0

DON’T

CARE

= 0

DON’T

CARE

= 0

DON’T

CARE

= 0

CHIP SELECT

(CS)

SERIAL CLK

(SCK)

DATA

CLK = 0

PWM-OUT = 0

(CS)

SCK

DATA

CLK

PWM-OUT

FREQUENCY WORD

PULSE WIDTH (PWM) WORD

BIT 0

= 1

0

1

2

3

4

5

6

7

0

1

2

BIT 1

= 0

BIT 2

= 0

BIT 3

= 0

BIT 4

= 0

BIT 5

= 0

BIT 6

= 0

BIT 7

= 0

BIT 0

= 0

BIT 1

= 0

BIT 2

= 1

LSB

MSB

LSB

LSB

MSB

MSB

TOTAL OUTPUT PERIOD =

5 X (INPUT CLOCK PERIOD)

OUTPUT

(PWM)

CLK

PWM

OUT

FIGURE 3. CDP68HC68W1 INTERFACE TIMING SPECIFICATIONS (CONTINUED)

INPUT

CLOCK (CLK)

CDP68HC68W1