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## CDP1855 Datasheet(PDF) 5 Page - Intersil Corporation

 Part # CDP1855 Description 8-Bit Programmable Multiply/Divide Unit Download 15 Pages Scroll/Zoom 100% Manufacturer INTERSIL [Intersil Corporation] Direct Link http://www.intersil.com/cda/home Logo

## CDP1855 Datasheet(HTML) 5 Page - Intersil Corporation

 5 / 15 page4-51A second division is performed using the remainder from theﬁrst division (in Y) as the more signiﬁcant 8N-bits of the divi-dend and the less signiﬁcant half of the original dividendloaded into the Z register. The divisor in X remains unalteredand is, by deﬁnition, larger than the remainder from the ﬁrstdivision which is in Y. The resulting value in Z becomes theless signiﬁcant 8N-bits of the ﬁnal quotient and the value in Yis, as usual, the remainder.Extending this technique to more steps allows division of anysize number by an 8N-bit divisor.Note that division by zero is never permitted and must betested for and handled in software.The following example illustrates the use of this algorithm.Example:Assume three MDU's capable of a by 24-bit division. Theproblem is to divide 00F273, 491C06H by 0003B4H.The Z register can simply be reset using bit 2 of the controlword and another divide can be done in order to furtherdivide the remainder.3. Multiply OperationFor a multiply operation the two numbers to be multiplied areloaded in the X and Z registers. The result is in the Y and Zregister with Y being the more signiﬁcant half and Z the lesssigniﬁcant half. The X register will be unchanged after theoperation is completed.The original contents of the Y register are added to theproduct of X and Z. Bit 3 of the control word will resetregister Y to 0 if desired.Functional Description ofCDP1855 TerminalsCE - Chip Enable (Input):A high on this pin enables the CDP1855 MDU to respond tothe select lines. All cascaded MDU's must be enabledtogether. CE also controls the three-state C.O./O.F., outputof the most signiﬁcant MDU.Clear (Input):The CDP1855 MDU(s) must be cleared upon power-on witha low-on this pin. The clear signal resets the sequencecounters, the shift pulse generator, and bits 0 and 1 of thecontrol register.CTL - Control (Input):This is an input pin. All CTL pins must be wired together andto the YL of the most signiﬁcant CDP1855 MDU and to theZR of the least signiﬁcant CDP1855 MDU. This signal isused to indicate whether the registers are to be operated onor only shifted.C.O./O.F. - Carry Out/Over Flow (Output):This is a three-state output pin. It is the CDP1855 Carry Outsignal and is connected to Cl (CARRY-IN) of the next moresigniﬁcant CDP1855 MDU, except for on the most signiﬁcantMDU. On that MDU it is an overﬂow indicator and is enabledwhen chip enables is true. A low on this pin indicates that anoverﬂow has occurred. The overﬂow signal is latched eachtime the control register is loaded, but is only meaningfulafter a divide command.YL, YR - Y-Left, Y-Right:These are three-state bi-directional pins for data transferbetween the Y registers of cascaded CDP1855 MDU's. TheYR pin is an output and YL is an input during a multiply andthe reverse is true at all other times. The YL pin must beconnected to the YR pin of the next more signiﬁcant MDU.An exception is that the YL pin of the most signiﬁcantCDP1855 MDU must be connected to the ZR pin of the leastsigniﬁcant MDU and to the CTL pins of all MDU's. Also theYR pin of the least signiﬁcant MDU is tied to the ZL pin of themost signiﬁcant MDU.ZL, ZR - Z-Left, Z-Right:These are three-state bi-directional pins for data transfersbetween the “Z” registers of cascaded MDU's. The ZR pin isan output and ZL is an input during a multiply and thereverse is true at all other times. The ZL pin must be tied tothe YR pin of the next more signiﬁcant MDU. An exception isthat the ZL in of the most signiﬁcant MDU must be con-nected to the YR pin of the least signiﬁcant MDU. Also, theZR pin of the least signiﬁcant MDU is tied to the YL of themost signiﬁcant MDU.Shift - Shift Clock:This is a three-state bi-directional pin. It is an output on themost signiﬁcant MDU. And an input on all other MDU's. Itprovides the MDU system timing pulses. All SHIFT pins mustbe connected together for cascaded operation. A maximumof the 8N +1 shifts are required for an operation where "N"equals the number of MDU devices that are cascaded.CLK - Clock (Input):This pin should be grounded on all but the most signiﬁcantMDU. There is an optional reduction of clock frequency avail-able on this pin if so desired, controlled by bit 7 of the controlbyte.STB - Strobe (Input):When RD/WE is low, data is latched from bus lines on thefalling edge of this signal. It may be asynchronous to theclock. Strobe also increments the selected register'ssequence counter during reads and writes. TPB would beused in CDP1800 systems.Step 1:000000,00F273/0003B4=000041R=0001BFYZ(MS)XZ1Y1Step 2: 0001BF,491C06/0003B4=78C936R=00000EY1Z(LS)XZ2Y2Result:000041,78C936R=00000EZ1Z2Y2CDP1855, CDP1855C

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