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CD4502BMS Datasheet(PDF) 8 Page - Intersil Corporation

Part # CD4502BMS
Description  CMOS Strobed Hex Inverter/Buffer
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CD4502BMS Datasheet(HTML) 8 Page - Intersil Corporation

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All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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CD4502BMS
FIGURE 9. TYPICAL TRANSITION TIME AS A FUNCTION OF
LOAD CAPACITANCE
FIGURE 10. TYPICAL PROPAGATION DELAY TIME AS A
FUNCTION OF LOAD CAPACITANCE
Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
METALLIZATION:
Thickness: 11k
Å
− 14kÅ, AL.
PASSIVATION:
10.4kÅ - 15.6k
Å, Silane
BOND PADS:
0.004 inches X 0.004 inches MIN
DIE THICKNESS:
0.0198 inches - 0.0218 inches
Typical Performance Characteristics (Continued)
AMBIENT TEMPERATURE (TA) = +25
oC
LOAD CAPACITANCE (CL) (pF)
020
50
SUPPLY VOLTAGE (VDD) = 5V (tTLH)
40
60
80
100
100
150
5V (tTLH)
10V (tTLH)
10V (tTHL)
15V (tTLH)
15V (tTLH)
AMBIENT TEMPERATURE (TA) = +25
oC
LOAD CAPACITANCE (CL) (pF)
020
50
SUPPLY VOLTAGE (VDD) = 5V (tPLH)
40
60
80
100
100
150
5V (tPHL)
10V (tPLH)
10V (tPHL)
15V (tPLH)
15V (tPHL)
200
250


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