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CD4018BMS Datasheet(PDF) 9 Page - Intersil Corporation

Part # CD4018BMS
Description  CMOS Presettable Divide-By- “N” Counter
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CD4018BMS Datasheet(HTML) 9 Page - Intersil Corporation

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All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
CD4018BMS
FIGURE 12. EXTERNAL CONNECTIONS FOR DIVIDE BY 10, 9,
8, 7, 6, 5, 4, 3, 2 OPERATION
EXTERNAL CONNECTIONS FOR DIVIDE BY 10, 9, 8, 7, 6, 5, 4, 3,
OPERATION
DIVIDE BY 10 Q5 Connected
Back To “Data”
No External Components
Required
DIVIDE BY 8
Q4 Connected
Back To “Data”
No External Components
Required
DIVIDE BY 6
Q3 Connected
Back To “Data”
No External Components
Required
DIVIDE BY 4
Q2 Connected
Back To “Data”
No External Components
Required
DIVIDE BY 2
Q1
DIVIDE BY 9
Q4
Q5
1/2 CD4011B
CONNECTED BACK TO “DATA”
(SKIPS “ALL-I’s” STATE)
DIVIDE BY 7
Q3
Q4
1/2 CD4011B
CONNECTED BACK TO “DATA”
(SKIPS “ALL-I’s” STATE)
DIVIDE BY 5
Q2
Q3
1/2 CD4011B
CONNECTED BACK TO “DATA”
(SKIPS “ALL-I’s” STATE)
DIVIDE BY 3
Q1
Q2
1/2 CD4011B
CONNECTED BACK TO “DATA”
(SKIPS “ALL-I’s” STATE)
FIGURE 13. EXAMPLE OF DIVIDE BY 7
Chip Dimensions and Pad Layout
D
R
CL
Q3 Q4
J1 J2 J3 J4 J5
CL
÷ 7
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10-3 inch)
METALLIZATION:
Thickness: 11k
Å
− 14kÅ, AL.
PASSIVATION:
10.4kÅ - 15.6k
Å, Silane
BOND PADS:
0.004 inches X 0.004 inches MIN
DIE THICKNESS:
0.0198 inches - 0.0218 inches


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