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AD7796 Datasheet(PDF) 21 Page - Analog Devices

Part # AD7796
Description  Low Power, 16-/24-Bit Sigma-Delta ADC
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7796 Datasheet(HTML) 21 Page - Analog Devices

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AD7796/AD7797
Rev. A | Page 21 of 24
RESET
The circuitry and serial interface of the AD7796/AD7797 can
be reset by writing 32 consecutive 1s to the device. This resets
the logic, the digital filter, and the analog modulator, while all
on-chip registers are reset to their default values. A reset is
automatically performed on power-up. When a reset is initiated,
the user must allow a period of 500 μs before accessing any of
the on-chip registers. A reset is useful if the serial interface
becomes asynchronous because of noise on the SCLK line.
BURNOUT CURRENTS
The AD7796/AD7797 contain two 100 nA constant current
generators, one sourcing current from AVDD to AIN(+) and one
sinking current from AIN(–) to GND. Both currents are either
on or off, depending on the burnout current enable (BO) bit in
the configuration register. These currents can be used to verify
that an external transducer is still operational before attempting
to take measurements. When the burnout currents are turned
on, they flow in the external transducer circuit, and a measure-
ment of the input voltage on the analog input channel can be
taken. If the resulting voltage is full scale, the user needs to
verify why this is the case. A full-scale reading could mean that
the front-end sensor is open circuit. It could also mean that the
front-end sensor is overloaded and is justified in outputting full
scale, or that the reference could be absent, thus clamping the
data to all 1s.
When reading all 1s from the output, the user needs to check
these three cases before making a judgment. If the voltage
measured is 0 V, it could indicate that the transducer has short
circuited. For normal operation, these burnout currents are
turned off by writing a 0 to the BO bit in the configuration
register.
AVDD MONITOR
Along with converting external voltages, the ADC can be used
to monitor the voltage on the AVDD pin. When Bit CH2 to
Bit CH0 equal 1, the voltage on the AVDD pin is internally
attenuated by 6. The resulting voltage is applied to the
Σ-Δ modulator using an internal 1.17 V reference for analog-to-
digital conversion. This is useful because variations in the
power supply voltage can be monitored.
TEMPERATURE MONITOR
The AD7796/AD7797 have an embedded temperature sensor
that is accessed when Bit CH2 to Bit CH0 are equal to 1, 1, 0,
respectively. When the internal temperature sensor is selected,
the AD7796/AD7797 use an internal 1.17 V reference for
the conversions. The temperature sensor has a sensitivity of
0.81 mV/°C. However, a two-point calibration is required to
optimize the accuracy. The temperature sensor is not factory
calibrated; a user calibration is required. Following a
calibration, the accuracy is 2°C.
CALIBRATION
The AD7796/AD7797 provide three calibration modes that can
be programmed via the mode bits in the mode register. These
are internal zero-scale calibration, system zero-scale calibration,
and system full-scale calibration, which effectively reduces the
offset error and full-scale error to the order of the noise. After
each conversion, the ADC conversion result is scaled using the
ADC calibration registers before being written to the data
register. The offset calibration coefficient is subtracted from the
result prior to multiplication by the full-scale coefficient.
To start a calibration, write the relevant value to the MD2 to
MD0 bits in the mode register. DOUT/RDY goes high when the
calibration is initiated. After the calibration is complete, the
contents of the corresponding calibration registers are updated,
the RDY bit in the status register is set, the DOUT/ RDY pin goes
low (if CS is low), and the AD7796/AD7797 revert to idle mode.
During an internal zero-scale calibration, the zero input is
automatically connected internally to the ADC input pins. A
system calibration, however, expects the system zero-scale and
system full-scale voltages to be applied to the ADC pins before
the calibration mode is initiated. In this way, external ADC
errors are removed.
From an operational point of view, a calibration should be
treated like another ADC conversion. A zero-scale calibration
(if required) should always be performed before a full-scale
calibration. System software should monitor the RDY bit in the
status register or the DOUT/RDY pin to determine the end of
calibration via a polling sequence or an interrupt-driven routine.
Both an internal offset calibration and system offset calibration
takes two conversion cycles. An internal offset calibration is not
needed because the ADC itself removes the offset continuously.
A system full-scale calibration takes two conversion cycles to
complete. The measured full-scale coefficient is placed in the
full-scale register. If system offset calibrations are being
performed along with system full-scale calibrations, the offset
calibration should be performed before the system full-scale
calibration is initiated.


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