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AD7790 Datasheet(PDF) 15 Page - Analog Devices

Part No. AD7790
Description  Low Power, 16-Bit Buffered Sigma-Delta ADC
Download  20 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD7790 Datasheet(HTML) 15 Page - Analog Devices

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Data Sheet
AD7790
Rev. A | Page 15 of 20
Single Conversion Mode
In single conversion mode, the AD7790 is placed in shutdown
mode between conversions. When a single conversion is initiat-
ed by setting MD1 to 1 and MD0 to 0 in the mode register, the
AD7790 powers up, performs a single conversion, and then
returns to shutdown mode. A conversion will require a time
period of 2 × tADC. DOUT/RDY goes low to indicate the com-
pletion of a conversion. When the data-word has been read
from the data register, DOUT/RDY will go high. If CS is low,
DOUT/RDY will remain high until another conversion is initi-
ated and completed. The data register can be read several times,
if required, even when DOUT/ RDY has gone high.
Continuous Conversion Mode
This is the default power-up mode. The AD7790 will continu-
ously convert, the RDY pin in the status register going low each
time a conversion is complete. If CS is low, the DOUT/RDY line
will also go low when a conversion is complete. To read a con-
version, the user can write to the communications register,
indicating that the next operation is a read of the data register.
The digital conversion will be placed on the DOUT/RDY pin as
soon as SCLK pulses are applied to the ADC. DOUT/RDY will
return high when the conversion is read. The user can read this
register additional times, if required. However, the user must
ensure that the data register is not being accessed at the comple-
tion of the next conversion or else the new conversion word will
be lost.
03538-0-011
DIN
SCLK
DOUT/RDY
CS
0x10
0x38
0x82
DATA
Figure 8. Single Conversion
03538-0-012
DIN
SCLK
DOUT/RDY
CS
0x38
0x38
DATA
DATA
Figure 9. Continuous Conversion


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