AD7545 datasheet(3/7 Pages) INTERSIL

Part #	AD7545

Description	12-Bit, Buffered, Multiplying CMOS DAC

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Manufacturer	INTERSIL [Intersil Corporation]

Direct Link	http://www.intersil.com/cda/home

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3 / 7 page

10-12

REFERENCE INPUT

Input Resistance (Pin 19 to GND)

Input Resistance

TC = -300ppm/oC (Typ)

7-

-7-

-

k

Ω

Typical Input Resistance = 11k

Ω

-

25

-

25

k

Ω

DIGITAL INPUTS

Input High Voltage, VIH

2.4

-

13.5

V

Input Low Voltage, VIL

-

0.8

-

1.5

V

Input Current, IIN

VIN = 0 or VDD (Note 7)

±1-

±10

±1-

±10

µA (Max)

Input Capacitance

DB0 - DB11

VIN = 0 (Note 4)

-

7

-

7

pF

WR, CS

VIN = 0 (Note 4)

-

20

-

20

pF

SWITCHING CHARACTERISTICS (Note 4)

Chip Select to Write Setup Time, tCS See Figure 1

380

200

-

200

120

-

ns

Chip Select to Write Hold Time, tCH See Figure 1

0

-

0

-

ns

Write Pulse Width, tWR

tCS ≥ tWR, tCH ≥ 0, See Figure 1

400

175

-

240

100

ns

Data Setup Time, tDS

See Figure 1

210

100

-

120

60

-

ns

Data Hold Time, tDH

See Figure 1

10

-

10

-

ns

POWER SUPPLY CHARACTERISTICS

IDD

All Digital Inputs VIL or VIH

-

-2-

-2

mA

All Digital Inputs 0V or VDD

-

100

500

-

100

500

µA

All Digital Inputs 0V or VDD

-10-

µA

NOTES:

2. Temperature Ranges as follows: J, K versions:

0oC to 70oC

A, B versions: -20oC to 85oC

S version:

-55oC to 125oC

TA = 25

oC for TYP Speciﬁcations. MIN and MAX are measured over the speciﬁed operating range.

3. This includes the effect of 5ppm maximum gain TC.

4. Parameter not tested. Parameter guaranteed by design, simulation, or characterization.

5. DB0 - DB11 = 0V to VDD or VDD to 0V in plastic and sidebraze package.

6. Feedthrough can be further reduced by connecting the metal lid on the ceramic package to DGND.

7. Logic inputs are MOS gates. Typical input current (25oC) is less than 1nA.

8. Typical values are not guaranteed but reflect mean performance specification.

Specifications subject to change without notice.

Electrical Speciﬁcations

TA = See Note 2, VREF = +10V, VOUT1 = 0V, AGND = DGND, Unless Otherwise Speciﬁed (Continued)

PARAMETER

TEST CONDITIONS

VDD = +5V

VDD = +15V

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

Timing Diagrams

FIGURE 1A. TYPICAL WRITE CYCLE

FIGURE 1B. PREFERRED WRITE CYCLE

FIGURE 1. WRITE CYCLE TIMING DIAGRAM

DATA VALID

CHIP

SELECT

WRITE

DATA IN

(DB0 - DB11)

VDD

0

VDD

0

tCS

tWR

tDS

tDH

tCH

DATA VALID

CHIP

SELECT

WRITE

DATA IN

(DB0 - DB11)

VDD

0

VDD

0

tCS

tWR

tDS

tDH

tCH

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