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AD5725 Datasheet(PDF) 6 Page - Analog Devices |
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AD5725 Datasheet(HTML) 6 Page - Analog Devices |
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6 / 20 page  AD5725 Data Sheet Rev. C | Page 6 of 20 TIMING CHARACTERISTICS1, 2 AVDD = +5 V/+15 V, AVSS = −5 V/0 V/−15 V, DGND = 0 V; VREFP = +2.5 V/+10 V; VREFN = −2.5 V/0 V/−10 V, VL = 5 V. All specifications TMIN to TMAX, unless otherwise noted. Table 4. Parameter Limit at TMIN, TMAX Unit Description tWCS 10 ns min Chip Select Write Pulse Width tWS 0 ns min Write Setup, tWCS = 10 ns tWH 0 ns min Write Hold, tWCS = 10 ns tAS 0 ns min Address Setup tAH 0 ns min Address Hold tLS 5 ns min Load Setup tLH 5 ns min Load Hold tWDS 5 ns min Write Data Setup, tWCS = 10 ns tWDH 0 ns min Write Data Hold, tWCS = 10 ns tLDW 10 ns min Load Data Pulse Width tRESET 10 ns min Reset Pulse Width tRCS 30 ns min Chip Select Read Pulse Width tRDH 0 ns min Read Data Hold, tRCS = 30 ns tRDS 0 ns min Read Data Setup, tRCS = 30 ns tDZ 15 ns max Data to High-Z, CL = 10 pF tCSD 35 ns max Chip Select to Data, CL = 100 pF 1 All input control signals are specified with tr = tf = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V. 2 Guaranteed by design and characterization, not production tested. |
Similar Part No. - AD5725_15 |
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Similar Description - AD5725_15 |
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