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IDT79RV3081E-33PFM Datasheet(PDF) 3 Page - Integrated Device Technology |
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IDT79RV3081E-33PFM Datasheet(HTML) 3 Page - Integrated Device Technology |
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3 / 38 page  5.5 3 IDT79R3081 RISController MILITARY AND COMMERCIAL TEMPERATURE RANGES The extended architecture versions of the R3051 family (the R3051E, R3052E, and R3081E) allow the system designer to implement kernel software which dynamically manages user task utilization of system resources, and also allows the Kernel to protect certain resources from user tasks. These capabilities are important in general computing applications such as ARC computers, and are also important in a variety of embedded applications, from process control (where protection may be important) to X-Window display systems (where virtual memory management can be used). The MMU can also be used to simplify system debug. R3051 family base versions (the R3051, R3052, and R3081) remove the TLB and institute a fixed address mapping for the various segments of the virtual address space. These devices still support distinct kernel and user mode operation, but do not require page management software, leading to a simpler software model. The memory mapping used by these devices is shown in Figure 4. Note that the reserved spaces are for compatiblity with future family members, which may map on- chip resources to these addresses. References to these addresses in the R3081 will be translated in the same fashion as the rest of their respective segments, with no traps or exceptions signalled. When using the base versions of the architecture, the system designer can implement a distinction between the user tasks and the kernel tasks, without having to implement page management software. This distinction can be implemented by decoding the output physical address. In systems which do not need memory protection, and wish to have the kernel and user tasks operate out of the same memory space, high-order address lines can be ignored by the address decoder, and thus all references will be seen in the lower gigabyte of the physical address space. Floating Point Co-Processor The R3081 also integrates an R3010A compatible floating point accelerator on-chip. The FPA is a high-performance co- processor (co-processor 1 to the CPU) providing separate add, multiply, and divide functional units for single and double precision floating point arithmetic. The floating point accelerator features low latency operations, and autonomous functional units which allow differing types of floating point operations to function concurrently with integer operations. The R3010A appears to the software programmer as a simple extension of the integer execution unit, with 16 dedicated 64-bit floating point registers (software references these as 32 32-bit registers when performing loads or stores). Figure 5 illustrates the functional block diagram of the on-chip FPA. Clock Generator Unit The R3081 is driven from a single input clock which can be either at the processor rated speed, or at twice that speed. On- chip, the clock generator unit is responsible for managing the interaction of the CPU core, caches, and bus interface. The R3081 includes an on-chip clock doubler to provide higher frequency signals to the internal execution core; if 1x clock mode is selected, the clock doubler will internally convert it to Figure 4. Virtual to Physical Mapping of Base Architecture Versions 1MB Kernel Rsvd Kernel Cacheable Tasks Kernel/User Cacheable Tasks Inaccessible Kernel Boot and I/O 0xffffffff 0xc0000000 0xa0000000 0x80000000 0x00000000 1024 MB 2048 MB 512 MB 512 MB VIRTUAL PHYSICAL Kernel Cached (kseg2) Kernel Uncached (kseg1) Kernel Cached (kseg0) User Cached (kuseg) 1MB User Rsvd 2889 drw 04 Figure 3. Virtual to Physical Mapping of Extended Architecture Versions Kernel Mapped (kseg2) Kernel Uncached (kseg1) Kernel Cached (kseg0) User Mapped Cacheable (kuseg) Physical Memory Memory 0xffffffff 0xc0000000 0xa0000000 0x80000000 0x00000000 3548MB 512 MB Any Any VIRTUAL PHYSICAL 2889 drw 03 Figure 2. R3081 5-Stage Pipeline IF Current CPU Cycle I#1 ALU RD MEM WB IF I#2 ALU RD MEM WB IF I#3 ALU RD MEM WB IF I#4 ALU RD MEM WB IF I#5 ALU RD MEM WB 2889 drw 02 |
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