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LXT970ATC Datasheet(PDF) 3 Page - Intel Corporation |
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LXT970ATC Datasheet(HTML) 3 Page - Intel Corporation |
3 / 74 page Datasheet 3 Dual-Speed Fast Ethernet Transceiver — LXT970A Contents 1.0 Pin Assignments and Signal Descriptions....................................................10 2.0 Functional Description...........................................................................................18 2.1 Introduction.......................................................................................................... 18 2.2 Interfaces (Network Media/Protocol Support) ..................................................... 19 2.2.1 Twisted-Pair Interface ............................................................................19 2.2.2 Fiber Interface ........................................................................................ 19 2.2.3 MII Interface ........................................................................................... 20 2.2.3.1 Selectable Driver Levels............................................................ 20 2.2.3.2 MII Data Interface ...................................................................... 21 2.2.3.3 Repeater Mode.......................................................................... 24 2.2.3.4 MII Management Interface ........................................................ 24 2.2.4 Hardware Control Interface .................................................................... 26 2.3 Operating Requirements ..................................................................................... 27 2.3.1 Power Supply Requirements.................................................................. 27 2.3.1.1 Optional MII Power Supply ........................................................ 27 2.3.2 Reference Clock Requirements ............................................................. 27 2.3.2.1 Master Clock Mode ................................................................... 28 2.3.2.2 Slave Clock Mode .....................................................................28 2.3.3 Bias Circuit Requirements...................................................................... 29 2.4 Initialization.......................................................................................................... 29 2.4.1 Control Mode Selection .......................................................................... 29 2.4.1.1 MDIO Control Mode .................................................................. 29 2.4.1.2 Manual Control Mode ................................................................ 29 2.4.2 Link Configuration ..................................................................................29 2.4.2.1 Manual Configuration ................................................................ 30 2.4.2.2 Auto-Negotiation/Parallel Detection .......................................... 30 2.5 Monitoring Operational Status............................................................................. 31 2.5.1 Monitoring Status via MII Registers........................................................ 31 2.5.2 Monitoring Status via Indicator Pins ....................................................... 32 2.6 100BASE-X Operation ........................................................................................ 32 2.6.1 100BASE-X MII Operations.................................................................... 32 2.6.2 100BASE-X Network Operations ........................................................... 33 2.7 10BASE-T Operation........................................................................................... 35 2.7.1 10BASE-T MII Operations...................................................................... 35 2.7.2 10BASE-T Network Operations.............................................................. 35 2.8 Protocol Sublayer Operations ............................................................................. 35 2.8.1 PCS Sublayer .........................................................................................35 2.8.1.1 100X Preamble Handling .......................................................... 36 2.8.1.2 10T Preamble Handling............................................................. 36 2.8.1.3 Data Errors (100X Only) ............................................................ 36 2.8.1.4 Collision Indication .................................................................... 37 2.8.1.5 SQE (10T Only) ......................................................................... 38 2.8.1.6 Jabber (10T Only) .....................................................................38 2.8.2 PMA Layer.............................................................................................. 38 2.8.2.1 100TX Link Options ................................................................... 38 2.8.2.2 10T Link Test............................................................................. 38 |
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