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N80C188EB25 Datasheet(PDF) 7 Page - Intel Corporation |
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N80C188EB25 Datasheet(HTML) 7 Page - Intel Corporation |
7 / 59 page 80C186EB80C188EB 80L186EB80L188EB Serial Communications Unit The Serial Control Unit (SCU) of the 80C186EB con- tains two independent channels Each channel is identical in operation except that only channel 0 is supported by the integrated interrupt controller (channel 1 has an external interrupt pin) Each channel has its own baud rate generator that is in- dependent of the TimerCounter Unit and can be internally or externally clocked at up to one half the 80C186EB operating frequency Independent baud rate generators are provided for each of the serial channels For the asynchronous modes the generator supplies an 8x baud clock to both the receive and transmit register logic A 1x baud clock is provided in the synchronous mode Chip-Select Unit The 80C186EB Chip-Select Unit (CSU) integrates logic which provides up to ten programmable chip- selects to access both memories and peripherals In addition each chip-select can be programmed to automatically insert additional clocks (wait-states) into the current bus cycle and automatically termi- nate a bus cycle independent of the condition of the READY input pin IO Port Unit The IO Port Unit (IPU) on the 80C186EB supports two 8-bit channels of input output or inputoutput operation Port 1 is multiplexed with the chip select pins and is output only Most of Port 2 is multiplexed with the serial channel pins Port 2 pins are limited to either an output or input function depending on the operation of the serial pin it is multiplexed with Refresh Control Unit The Refresh Control Unit (RCU) automatically gen- erates a periodic memory read bus cycle to keep dynamic or pseudo-static memory refreshed A 9-bit counter controls the number of clocks between re- fresh requests A 12-bit address generator is maintained by the RCU and is presented on the A121 address lines during the refresh bus cycle Address bits A1913 are pro- grammable to allow the refresh address block to be located on any 8 Kbyte boundary Power Management Unit The 80C186EB Power Management Unit (PMU) is provided to control the power consumption of the device The PMU provides three power modes Ac- tive Idle and Powerdown Active Mode indicates that all units on the 80C186EB are functional and the device consumes maximum power (depending on the level of periph- eral operation) Idle Mode freezes the clocks of the Execution and Bus units at a logic zero state (all peripherals continue to operate normally) The Powerdown mode freezes all internal clocks at a logic zero level and disables the crystal oscillator All internal registers hold their values provided VCC is maintained Current consumption is reduced to just transistor junction leakage 80C187 Interface (80C186EB Only) The 80C186EB (PLCC package only) supports the direct connection of the 80C187 Numerics Coproc- essor ONCE Test Mode To facilitate testing and inspection of devices when fixed into a target system the 80C186EB has a test mode available which forces all output and input output pins to be placed in the high-impedance state ONCE stands for ‘‘ON Circuit Emulation’’ The ONCE mode is selected by forcing the A19ONCE pin LOW (0) during a processor reset (this pin is weakly held to a HIGH (1) level) while RESIN is ac- tive 7 7 |
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