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80L186EA Datasheet(PDF) 5 Page - Intel Corporation

Part # 80L186EA
Description  16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

80L186EA Datasheet(HTML) 5 Page - Intel Corporation

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80C186EA80C188EA 80L186EA80L188EA
272432 – 3
(A) Crystal Connection
NOTE
The L1C1 network is only required when using a third-overtone crystal
272432 – 4
(B) Clock Connection
Figure 2 Clock Configurations
80C186EA PERIPHERAL
ARCHITECTURE
The 80C186EA has integrated several common sys-
tem peripherals with a CPU core to create a com-
pact yet powerful system The integrated peripher-
als are designed to be flexible and provide logical
interconnections between supporting units (eg the
interrupt control unit supports interrupt requests
from the timercounters or DMA channels)
The list of integrated peripherals include
 4-Input Interrupt Control Unit
 3-Channel TimerCounter Unit
 2-Channel DMA Unit
 13-Output Chip-Select Unit
 Refresh Control Unit
 Power Management logic
The registers associated with each integrated peri-
heral are contained within a 128 x 16 register file
called the Peripheral Control Block (PCB) The PCB
can be located in either memory or IO space on
any 256 byte address boundary
Figure 3 provides a list of the registers associated
with the PCB when the processor’s Interrupt Control
Unit is in Master Mode In Slave Mode the defini-
tions of some registers change Figure 4 provides
register definitions specific to Slave Mode
Interrupt Control Unit
The 80C186EA can receive interrupts from a num-
ber of sources both internal and external The Inter-
rupt Control Unit (ICU) serves to merge these re-
quests on a priority basis for individual service by
the CPU Each interrupt source can be independent-
ly masked by the Interrupt Control Unit or all inter-
rupts can be globally masked by the CPU
Internal interrupt sources include the Timers and
DMA channels External interrupt sources come
from the four input pins INT30 The NMI interrupt
pin is not controlled by the ICU and is passed direct-
ly to the CPU Although the timers only have one
request input to the ICU separate vector types are
generated to service individual interrupts within the
Timer Unit
TimerCounter Unit
The 80C186EA TimerCounter Unit (TCU) provides
three 16-bit programmable timers Two of these are
highly flexible and are connected to external pins for
control or clocking A third timer is not connected to
any external pins and can only be clocked internally
However it can be used to clock the other two timer
channels The TCU can be used to count external
events time external events generate non-repeti-
tive waveforms generate timed interrupts etc
5
5


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