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80960CF-40 Datasheet(PDF) 5 Page - Intel Corporation

Part No. 80960CF-40
Description  80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESSOR
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Maker  INTEL [Intel Corporation]
Homepage  http://www.intel.com
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80960CF-40 Datasheet(HTML) 5 Page - Intel Corporation

 
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PRELIMINARY
v
A
CONTENTS
Figure 40.
Using External READY ............................................................................................................ 63
Figure 41.
Terminating a Burst with BTERM ............................................................................................. 64
Figure 42.
BOFF Functional Timing .......................................................................................................... 65
Figure 43.
HOLD Functional Timing .......................................................................................................... 66
Figure 44.
DREQ and DACK Functional Timing ....................................................................................... 67
Figure 45.
EOP Functional Timing ............................................................................................................ 67
Figure 46.
Terminal Count Functional Timing ........................................................................................... 68
Figure 47.
FAIL Functional Timing ............................................................................................................ 68
Figure 48.
A Summary of Aligned and Unaligned Transfers for Little Endian Regions ............................. 69
Figure 49.
A Summary of Aligned and Unaligned Transfers for Little Endian Regions (Continued) ......... 70
Figure 50.
Idle Bus Operation ................................................................................................................... 71
TABLES
Table 1.
80960CF Instruction Set ............................................................................................................ 4
Table 2.
80960CF Pin Description — External Bus Signals .................................................................... 6
Table 3.
80960CF Pin Description — Processor Control Signals ............................................................ 9
Table 4.
80960CF Pin Description — DMA and Interrupt Unit Control Signals ..................................... 11
Table 5.
80960CF PGA Pinout — In Signal Order ................................................................................ 14
Table 6.
80960CF PGA Pinout — In Pin Order ..................................................................................... 15
Table 7.
80960CF PQFP Pinout — In Signal Order (80960CF-33, -25, -16 Only) ................................ 17
Table 8.
80960CF PQFP Pinout — In Pin Order (80960CF-33, -25, -16 Only) ..................................... 18
Table 9.
Maximum TA at Various Airflows in
oC (PGA Package Only) ................................................... 20
Table 10.
80960CF PGA Package Thermal Characteristics ................................................................... 21
Table 11.
80960CF PQFP Package Thermal Characteristics ................................................................. 21
Table 12.
Die Stepping Cross Reference ................................................................................................ 22
Table 13.
Operating Conditions ............................................................................................................... 23
Table 14.
DC Characteristics ................................................................................................................... 24
Table 15.
80960CF AC Characteristics (40 MHz) ................................................................................... 26
Table 16.
80960CF AC Characteristics (33 MHz) ................................................................................... 29
Table 17.
80960CF AC Characteristics (25 MHz) ................................................................................... 32
Table 18.
80960CF AC Characteristics (16 MHz) ................................................................................... 34
Table 19.
Reset Conditions ..................................................................................................................... 43
Table 20.
Hold Acknowledge and Backoff Conditions ............................................................................. 43


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