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AD5231BRU10-REEL7 Datasheet(PDF) 4 Page - Analog Devices |
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AD5231BRU10-REEL7 Datasheet(HTML) 4 Page - Analog Devices |
4 / 28 page AD5231 Data Sheet Rev. D | Page 4 of 28 Parameter Symbol Conditions Min Typ1 Max Unit POWER SUPPLIES Single-Supply Power Range VDD VSS = 0 V 2.7 5.5 V Dual-Supply Power Range VDD/VSS ±2.25 ±2.75 V Positive Supply Current IDD VIH = VDD or VIL = GND 2.7 10 µA Negative Supply Current ISS VIH = VDD or VIL = GND, VDD = +2.5 V, VSS = −2.5 V 0.5 10 µA EEMEM Store Mode Current IDD (store) VIH = VDD or VIL = GND, VSS = GND, ISS ≈ 0 40 mA ISS (store) VDD = +2.5 V, VSS = −2.5 V −40 mA EEMEM Restore Mode Current7 IDD (restore) VIH = VDD or VIL = GND, VSS = GND, ISS ≈ 0 0.3 3 9 mA ISS (restore) VDD = +2.5 V, VSS = −2.5 V −0.3 −3 −9 mA Power Dissipation8 PDISS VIH = VDD or VIL = GND 0.018 0.05 mW Power Supply Sensitivity5 PSS ΔVDD = 5 V ± 10% 0.002 0.01 %/% DYNAMIC CHARACTERISTICS5, 9 Bandwidth BW −3 dB, RAB = 10 kΩ/50 kΩ/ 100 kΩ 370/85/44 kHz Total Harmonic Distortion THDW VA = 1 V rms, VB = 0 V, f = 1 kHz, RAB = 10 kΩ 0.045 % VA = 1 V rms, VB = 0 V, f = 1 kHz, RAB = 50 kΩ, 100 kΩ 0.022 % VW Settling Time tS VA = VDD, VB = 0 V, VW = 0.50% error band, Code 0x000 to 0x200 for RAB = 10 kΩ/50 kΩ/100 kΩ 1.2/3.7/7 µs Resistor Noise Voltage eN_WB RWB = 5 kΩ, f = 1 kHz 9 nV/√Hz 1 Typical values represent average readings at 25°C and VDD = 5 V. 2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. IW ~ 50 µA @ VDD = 2.7 V and IW ~ 400 µA @ VDD = 5 V for the RAB = 10 kΩ version, IW ~ 50 µA for the RAB = 50 kΩ, and IW ~ 25 µA for the RAB = 100 kΩ version (see Figure 26). 3 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = VSS. DNL specification limits of −1 LSB minimum are guaranteed monotonic operating condition (see Figure 27). 4 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other. Dual-supply operation enables ground- referenced bipolar signal adjustment. 5 Guaranteed by design and not subject to production test. 6 Common-mode leakage current is a measure of the dc leakage from any Terminal B–W to a common-mode bias level of VDD/2. 7 EEMEM restore mode current is not continuous. Current consumed while EEMEM locations are read and transferred to the RDAC register (see Figure 23). To minimize power dissipation, a NOP Instruction 0 (0x0) should be issued immediately after Instruction 1 (0x1). 8 PDISS is calculated from (IDD × VDD) + (ISS × VSS). 9 All dynamic characteristics use VDD = +2.5 V and VSS = −2.5 V. |
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