 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
28F008C3 Datasheet(PDF) 15 Page - Intel Corporation |
|
||||||||||||||||||||||||||||||
28F008C3 Datasheet(HTML) 15 Page - Intel Corporation |
|
|
15 / 59 page  E 3 VOLT ADVANCED+ BOOT BLOCK 15 PRODUCT PREVIEW 3.2.6.1 Suspending and Resuming Erase Since an erase operation requires on the order of seconds to complete, an Erase Suspend command is provided to allow erase -sequence interruption in order to read data from or program data to another block in memory. Once the erase sequence is started, writing the Erase Suspend command to the CUI suspends the erase sequence at a predetermined point in the erase algorithm. The status register will indicate if/when the erase operation has been suspended. Erase suspend latency is specified by tWHRH2/tEHRH2. A Read Array/Program command can now be written to the CUI to read/program data from/to blocks other than that which is suspended. This nested Program command can subsequently be suspended to read yet another location. The only valid commands while erase is suspended are Read Status Register, Read Configuration, Read Query, Program Setup, Program Resume, Erase Resume, Lock Block, Unlock Block and Lock-Down Block. During erase suspend mode, the chip can be placed in a pseudo -standby mode by taking CE# to VIH. This reduces active current consumption. Erase Resume continues the erase sequence when CE# = VIL. As with the end of a standard erase operation, the status register must be read and cleared before the next instruction is issued. Table 5. Command Bus Definitions First Bus Cycle Second Bus Cycle Command Notes Oper Addr Data Oper Addr Data Read Array 4 Write X FFH Read Configuration 2, 4 Write X 90H Read IA ID Read Query 2, 4 Write X 98H Read QA QD Read Status Register 4 Write X 70H Read X SRD Clear Status Register 4 Write X 50H Program 3,4 Write X 40H/10H Write PA PD Block Erase/Confirm 4 Write X 20H Write BA D0H Program/Erase Suspend 4 Write X B0H Program/Erase Resume 4 Write X D0H Lock Block 4 Write X 60H Write BA 01H Unlock Block 4 Write X 60H Write BA D0H Lock-Down Block 4 Write X 60H Write BA 2FH Protection Program 4 Write X C0H Write PA PD X = Don’t Care PA = Prog Addr BA = Block Addr IA = Identifier Addr. QA = Query Addr. SRD = Status Reg. Data PD = Prog Data ID = Identifier Data QD = Query Data NOTES: 1. Bus operations are defined in Table 3. 2. Following the Read Configuration or Read Query commands, read operations output device configuration or CFI query information, respectively. See Section 3.2.2 and 3.2.4. 3. Either 40H or 10H command is valid, but the Intel standard is 40H. 4. When writing commands, the upper data bus [DQ8–DQ15] should be either VIL or VIH, to minimize current draw. |
Similar Part No. - 28F008C3 |
|
Similar Description - 28F008C3 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
