IA82510

Data Sheet

ASYNCHRONOUS SERIAL CONTROLLER

As of Production Ver. 01

Copyright

© 2001

ENG211001219-01

www.innovasic.com

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ERRATA

PLEASE NOTE:

• When using the -01 version of the IA82510, please refer to the errata section,

"Production Version -01, Errata".

• When using the -00 version of the IA82510, please refer to the errata section,

"Production Version -00, Errata".

Production Version -01, Errata

The following errata are known problems with the -01 version of the IA82510. This is inclusive of

all package types and environment grades. A workaround to the identified problem has been

provided where possible. ALL ERRATA LISTED IN PRODUCTION VERION -00 HAVE

BEEN FIXED IN THIS VERSION OF THE DEVICE UNLESS OTHERWISE NOTED.

-00 Errata not fixed in this Production Version:

1. Problem: Device does not operate at 8 MHz in divide-by-one mode

Analysis: System testing revealed this operational deficiency.

Workaround: Switch to divide-by-two mode using 2X clock input

New Errata for Production Version -01:

2. Problem: RX FIFO locks up unexpectedly just after configuration and before starting

reception.

Analysis: An RCM command is executed with data of xB8. This is an “enable RX”, “flush RX

machine”, “flush RX FIFO”, and “lock RX FIFO” command done in a single instruction. The

“flush RX machine” should unlock the RX FIFO, creating a conflict with the simultaneous

“lock RX FIFO” command. The original Intel device apparently ignores or gives the “lock RX

FIFO” command lower priority in this case. The IA82510 has this priority reversed.

Apparently, the application software in this case expected the “lock RX FIFO” command to

fail.

Workaround: Do not execute a “flush RX FIFO” and “lock RX FIFO” command

simultaneously. Break up into separate RCM commands.

3. Problem: Unreliable transmits in AUTO TX mode.

Analysis: Many systems use the RTS output to activate the line transceiver. When the

Transmit Mode field in the TMD register is set to semi-auto or automatic mode, RTS is

controlled by the TX state machine. On the first character, RTS asserts at the same time as

the start bit on the TXD output, whereas the original Intel device asserts RTS a full bit time

before assertion of the start bit on TXD. At full temperature range, the width of the start bit