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IDT79RV3081E-25PF Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT79RV3081E-25PF Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 38 page 5.5 7 IDT79R3081 RISController MILITARY AND COMMERCIAL TEMPERATURE RANGES many general purpose computing applications, such as ARC compliant systems. • Autonomous multiply and divide operations.The R3051 family features an on-chip integer multiplier/divide unit which is separate from the other ALU. This allows the CPU to perform multiply or divide operations in parallel with other integer operations, using a single multiply or divide instruction rather than “step” operations. • Integrated write buffer. The R3081 features a four deep write buffer, which captures store target addresses and data at the processor execution rate and retires it to main memory at the slower main memory access rate. Use of on- chip write buffers eliminates the need for the processor to stall when performing store operations. • Burst read support. The R3051 family enables the system designer to utilize page mode or nibble mode RAMs when performing read operations to minimize the main memory read penalty and increase the effective cache hit rates. These techniques combine to allow the processor to achieve over 43 VUPS integer performance, 13MFlops of Linpack performance, and 70,000 dhrystones without the use of external caches or zero wait-state memory devices. The performance differences between the various family members depends on the application software and the design of the memory system. The impact of the various cache sizes, and the hardware floating point, can be accurately modeled using Cache-3051. Since the R3041, R3051, R3052, R3071, and R3081 are all pin and software compatible, the system designer has maximum freedom in trading between performance and cost. A system can be designed, and later the appropriate CPU inserted into the board, depending on the desired system performance. SELECTABLE FEATURES The R3081 allows the system designer to configure certain aspects of operation. Some of these options are established when the device is reset, while others are enabled via the Config registers: • BigEndian vs. LittleEndian Byte Ordering. The part can be configured to operate with either byte ordering. ACE/ ARC systems typically use Little Endian byte ordering. However, various embedded applications, written originally for a Big Endian processor such as the MC680x0, are easier to port to a Big Endian system. • Data Cache Refill of one or four words. The memory system must be capable of performing four word refills of instruction cache misses. The R3081 allows the system designer to enable D-Cache refill of one or four words dynamically. Thus, specialized algorithms can choose one refill size, while the rest of the system can operate with the other. • Half-frequency bus mode. The processor can be configured such that the external bus interface is at one- half the frequency of the processor core. This simplifies system design; however, the large on-chip caches mitigate the performance impact of using a slower system bus clock. • Slow bus turn-around. The R3081 allows the system designer to space processor operations, so that more time is allowed for transitions between memory and the processor on the multiplexed address/data bus. • Configurable cache. The R3081 allows the system designer to use software to select either a 16kB Instruction Cache/4kB Data Cache organization, or an 8kB Instruction/ 8kB Data Cache organization. • Cache Coherent Interface. The R3081 has an optional hardware based cache coherency interface intended to support multi-master systems such as those utilizing DMA between memory and I/O. • Optional 1x or 2x clock input. The R3081 can be driven with an R3051 compatible 2x clock input, or a lower frequency 1x clock input. THERMAL CONSIDERATIONS The R3081 utilizes special packaging techniques to improve the thermal properties of high-speed processors. Thus, the R3081 is packaged using cavity down packaging, with an embedded thermal slug to improve thermal transfer to the suurrounding air. The R3081 utilizes the 84-pin MQUAD package (the "MJ" package), which is an all aluminum package with the die attached to a normal copper lead-frame mounted to the aluminum casing. The MQUAD package allows for an efficient thermal transfer between the die and the case due to the heat spreading effect of the aluminum. The aluminum offers less internal resistance from one end of the package to the other, reducing the temperature gradient across the package and therefore presenting a greater area for convection and conduction to the PCB for a given temperature. Even nominal amounts of airflow will dramatically reduce the junction temperature of the die, resulting in cooler operation. The MQUAD package is available at all frequencies, and is pin and form compatible with the PLCC used for the R3051. Thus, designers can inter-change R3081s and R3051s in a particular design, without changing their PC Board. The R3081 is guaranteed in a case temperature range of 0 °C to +85°C. The type of package, speed (power) of the device, and airflow conditions, affect the equivalent ambient temperature conditions which will meet this specification. The equivalent allowable ambient temperature, TA, can be calculated using the thermal resistance from case to ambient (ØCA) of the given package. The following equation relates ambient and case temperatures: TA = TC - P * ØCA where P is the maximum power consumption at hot temperature, calculated by using the maximum Icc specification for the device. Typical values for ØCA at various airflows are shown in Table 1. Note that the R3081 allows the operational frequency to be turned down during idle periods to reduce power consumption. This operation is described in the R3081 Hardware User's Guide. Reducing the operation frequency dramatically reduces power consumption. |
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