IA64F3048SEC

Advance Information Sheet

SECURITY-ENHANCED MICROCONTROLLER

Copyright

© 2001

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FEATURES

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4 Kbytes SRAM

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128 Kbytes EEPROM

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Additional 32x32 multiply instruction

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Hardware random number generator

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30MHz Clock Rate

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5V and 3.3V versions planned

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Sixteen 16-bit general registers

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Flexible instruction set built on 62 basic instruction types

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8/16/32-bit data transfer, arithmetic, and logic instructions

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Signed and unsigned multiply and divide instructions

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Extensive bit manipulation instructions

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Bus controller with 8-bit access

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3-function refresh controller

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DMA controller with short or full address mode

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16-bit integrated timer unit (ITU) with 5 channels

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Programmable timing pattern controller (TPC)

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Watchdog timer

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Serial communications interface (SCI) with built-in smart card interface

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Eight 10-bit A/D converter channels

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Two 8-bit D/A converter channels

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Clock pulse generator

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Interrupt controller with 37 sources

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Seventy input/output pins and eight input-only pins

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Available in 100 pin QFP package

The IA64F3048SEC is code compatible with the original Hitachi

® H8/300H family of

technology. This technology produces replacement ICs far more complex than "emulation" while

original IC so that even the "undocumented features" are duplicated.

This Advanced Information Sheet contains preliminary information for this the IA64F3048SEC.

The complete data sheet which documents all necessary engineering information about the

IA64F3048SEC including functional and I/O descriptions, electrical characteristics, and

applicable timing will be available when the device nears completion.