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IDT54FCT841CTLB Datasheet(PDF) 5 Page - Integrated Device Technology |
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IDT54FCT841CTLB Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 7 page 6.22 5 IDT54/74FCT841AT/BT/CT/DT FAST CMOS BUS INTERFACE LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT841AT FCT841BT Com'l. Mil. Com'l. Mil. Symbol Parameter Conditions(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit tPLH tPHL Propagation Delay DI to YI (LE = HIGH) CL = 50pF RL = 500 Ω 1.5 9.0 1.5 10.0 1.5 6.5 1.5 7.5 ns CL = 300pF(4) RL = 500 Ω 1.5 13.0 1.5 15.0 1.5 13.0 1.5 15.0 tPLH tPHL Propagation Delay LE to YI CL = 50pF RL = 500 Ω 1.5 12.0 1.5 13.0 1.5 8.0 1.5 10.5 ns CL = 300pF(4) RL = 500 Ω 1.5 16.0 1.5 20.0 1.5 15.5 1.5 18.0 tPZH tPZL Output Enable Time OE to YI CL = 50pF RL = 500 Ω 1.5 11.5 1.5 13.0 1.5 8.0 1.5 8.5 ns CL = 300pF(4) RL = 500 Ω 1.5 23.0 1.5 25.0 1.5 14.0 1.5 15.0 tPHZ tPLZ Output Disable Time OE to Y I CL = 5pF(4) RL = 500 Ω 1.5 7.0 1.5 9.0 1.5 6.0 1.5 6.5 ns CL = 50pF RL = 500 Ω 1.5 8.0 1.5 10.0 1.5 7.0 1.5 7.5 tSU Data to LE Set-up Time CL = 50pF 2.5 — 2.5 — 2.5 — 2.5 — ns tH Data to LE Hold Time RL = 500 Ω 2.5 — 3.0 — 2.5 — 2.5 — ns tW LE Pulse Width HIGH(3) 4.0 — 5.0 — 4.0 — 4.0 — ns NOTES: 2571 tbl 08 1. See test circuit and waveforms. 3. These parameters are guaranteed but not tested. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 4. These conditions are guaranteed but not tested. FCT841CT FCT841DT Com'l. Mil. Com'l. Mil. Symbol Parameter Conditions(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit tPLH tPHL Propagation Delay DI to YI (LE = HIGH) CL = 50pF RL = 500 Ω 1.5 5.5 1.5 6.3 1.5 4.2 — — ns CL = 300pF(4) RL = 500 Ω 1.5 13.0 1.5 15.0 1.5 8.0 — — tPLH tPHL Propagation Delay LE to YI CL = 50pF RL = 500 Ω 1.5 6.4 1.5 6.8 1.5 4.0 — — ns CL = 300pF(4) RL = 500 Ω 1.5 15.0 1.5 16.0 1.5 8.0 — — tPZH tPZL Output Enable Time OE to YI CL = 50pF RL = 500 Ω 1.5 6.5 1.5 7.3 1.5 4.8 — — ns CL = 300pF(4) RL = 500 Ω 1.5 12.0 1.5 13.0 1.5 9.0 — — tPHZ tPLZ Output Disable Time OE to Y I CL = 5pF(4) RL = 500 Ω 1.5 5.7 1.5 6.0 1.5 4.0 — — ns CL = 50pF RL = 500 Ω 1.5 6.0 1.5 6.3 1.5 4.0 — — tSU Data to LE Set-up Time CL = 50pF 2.5 — 2.5 — 1.5 — — — ns tH Data to LE Hold Time RL = 500 Ω 2.5 — 2.5 — 1.0 — — — ns tW LE Pulse Width HIGH(3) 4.0 — 4.0 — 3.0 — — — ns NOTES: 2571 tbl 09 1. See test circuit and waveforms. 3. These parameters are guaranteed but not tested. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 4. These conditions are guaranteed but not tested. |
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