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IDT54FCT841ATEB Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT54FCT841ATEB Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 7 page Integrated Device Technology, Inc. 1 The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST CMOS BUS INTERFACE LATCHES DESCRIPTION: The FCT8xxT series is built using an advanced dual metal CMOS technology. The FCT8xxT bus interface latches are designed to elimi- nate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The FCT841T are buffered, 10-bit wide versions of the popular FCT373T function. They are ideal for use as an output port requiring high IOL/IOH. All of the FCT8xxT high-performance interface family can drive large capacitive loads, while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes to ground and all outputs are designed for low-capaci- tance bus loading in high-impedance state. FEATURES: • Common features: – Low input and output leakage ≤1µA (max.) – CMOS power levels – True TTL input and output compatibility – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) – Meets or exceeds JEDEC standard 18 specifications – Product available in Radiation Tolerant and Radiation Enhanced versions – Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) – Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages • Features for FCT841T: – A, B, C and D speed grades – High drive outputs (-15mA IOH, 48mA IOL) – Power off disable outputs permit “live insertion” IDT54/74FCT841AT/BT/CT/DT MILITARY AND COMMERCIAL TEMPERATURE RANGES JUNE 1996 ©1996 Integrated Device Technology, Inc. 6.22 2571/6 FUNCTIONAL BLOCK DIAGRAM D0 D Y0 LE Q LE OE D1 D Y1 LE Q D2 D Y2 LE Q D3 D Y3 LE Q D4 D Y4 LE Q D5 D Y5 LE Q D8 D Y8 LE Q D9 D Y9 LE Q 2571 drw 01 |
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