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IDT54FCT162841ATPFB Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT54FCT162841ATPFB Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 9 page IDT54/74FCT16841AT/BT/CT/ET, 162841AT/BT/CT/ET FAST CMOS 20-BIT TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES 5.18 7 SWITCHING CHARACTERISTICS OVER OPERATING RANGE 2556 tbl 10 NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 4. This limit is guaranteed but not tested. 5. This condition is guaranteed but not tested. FCT16841CT/162841CT FCT16841ET/162841ET Com'l. Mil. Com'l. Mil. Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit tPLH tPHL Propagation Delay xDx to xQx CL = 50pF RL = 500 Ω 1.5 5.5 1.5 6.3 1.5 3.4 — — ns (LE = HIGH) CL = 300pF(5) RL = 500 Ω 1.5 13.0 1.5 15.0 1.5 7.5 — — tPLH tPHL Propagation Delay xLE to xQx CL = 50pF RL = 500 Ω 1.5 6.4 1.5 6.8 1.5 3.7 — — ns CL = 300pF(5) RL = 500 Ω 1.5 15.0 1.5 16.0 1.5 7.5 — — tPZH tPZL Output Enable Time x OE to xQx CL = 50pF RL = 500 Ω 1.5 6.5 1.5 7.3 1.5 4.4 — — ns CL = 300pF(5) RL = 500 Ω 1.5 12.0 1.5 13.0 1.5 9.0 — — tPHZ tPLZ Output Disable Time x OE to xQx CL = 5pF(5) RL = 500 Ω 1.5 5.7 1.5 6.0 1.5 3.6 — — ns CL = 50pF RL = 500 Ω 1.5 6.0 1.5 6.3 1.5 3.6 — — tSU Set-Up Time HIGH or LOW, xDx to xLE CL = 50pF RL = 500 Ω 2.5 — 2.5 — 1.0 — — — ns tH Hold Time HIGH or LOW, xDx to xLE 2.5 — 2.5 — 1.0 — — — ns tW xLE Pulse Width HIGH 4.0(4) — 4.0(4) — 3.0(4) ——— ns tSK(o) Output skew(3) — 0.5 — 0.5 — 0.5 — — ns |
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