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ILC1832 Datasheet(PDF) 4 Page - Impala Linear Corporation

Part No. ILC1832
Description  μP SUPERVISORY CIRCUIT
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Maker  IMPALA [Impala Linear Corporation]
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ILC1832 Datasheet(HTML) 4 Page - Impala Linear Corporation

   
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Pushbutton Reset Input
The PBRST input can be driven with a manual pushbutton
switch or with external logic signals. The input is internally
debounced and requires an active low signal to force the
reset outputs into their active states. The PBRST input will
recognize any pulse that is 20ms in duration or greater and
will ignore all pulses that are less than 1ms in duration.
Power Monitor
The RST and RST pins are asserted whenever VCC falls
below the reset threshold voltage set by the TOL pin. A 5%
tolerance level (2.88V reset threshold voltage) can be
selected by connecting the TOL pin to ground or a 10% tol-
erance (2.55V reset threshold voltage) can be selected by
connecting the TOL pin to VCC. The reset pins will remain
asserted for a period of 250ms after VCC has resen above
the reset threshold voltage. The reset function ensures the
microprocessor is properly reset and powers up into a
known condition after a power failure. RST will remain valid
with VCC as low as 1.4V.
Watchdog Timer
The microprocessor can be monitored by connecting the ST
pin (watchdog input) to a bus line or I/O line. If a high-to-
low transition does not occur on the ST pin within the watch-
dog timeout period set by the TD pin (see Table 1), the RST
and RST pins will be asserted rsulting in a microprocessor
reset. RST and RST will remain asserted for 250ms when
this occurs.
A minimum pulse of 75ns or any transition
high-to-low on the ST pin will reset the watchdog timer. The
watchdog timer will be reset if ST sees a valid transition
within the watchdog timeout period.
RST
t
RPD
V
CCTP
V
CCTP
t
RPU
V
CC
RST
RST
t
PDLY
t
RST
PBRST
RST
t
PB
tTD
TD Pin
Min.
Typ.
Max.
GND
62.5 ms
150 ms
250 ms
Open
250 ms
600 ms
1000 ms
VCC
500 ms
1200 ms
2000 ms
Industry P/N
ILC Direct Replacement
DS1832
ILC1832N
DS1832S
ILC1832M
t
SD
ST
t
TD
Power-Up/Power-Down Sequence
Watchdog Input
Pushbutton Reset
µP Supervisory Circuit
Preliminary
Circuit Description
Alternate Source Reference Guide
Impala Linear Corporation
4
(408) 574-3939
www.impalalinear.com
October 1999
ILC1832 1.1


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