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AD768 Datasheet(PDF) 11 Page - Analog Devices |
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AD768 Datasheet(HTML) 11 Page - Analog Devices |
11 / 20 page AD768 REV. B –11– For the values given in Figure 24, I3 equals 4 mA, which results in a nominal unipolar output swing of 0 V to 2 V. Note, since A1 has an inverting gain of approximately –4 and a noise gain of +5, A1’s distortion and noise performance should be considered. 1 27 28 AD768 RFB 500 Ω IOUTA LADCOM IOUTB RFF 100 Ω RL 24.9 Ω RP 20 Ω I1 I2 I3 A1 Figure 24. 0 V to 2 V Buffered Unipolar Output Using a Current Divider Bipolar Configuration Bipolar mode is accomplished by providing an offset current, IBIPOLAR, to the I/V amplifier’s (A1) summing junction. By set- ting IBIPOLAR to exactly half the full-scale current flowing through RFB, the resulting output voltage will be symmetrical about the summing junction voltage, typically ground. Figure 25 shows the implementation for a bipolar ±2.5 V buffered voltage output. The resistor divider sets the full-scale current for IDAC to 5 mA. The internal 2.5 V reference generates a 2.5 mA IBIPOLAR current across RBIP. An output voltage of 0 V is produced when the DAC is set to half scale (100. . .0) such that the 2.5 mA cur- rent, IDAC, is exactly offset by IBIPOLAR. As the DAC is varied from zero to full-scale, the output voltage swings from –2.5 V to +2.5 V. Note, in configurations that require more than 15 mA of total current from REFOUT, an external buffer is required. Op amps such as the AD811, AD8001, and AD9631 are good selections for superior dynamic performance. In dc applications, op amps such as the AD845 or AD797 may be more appropriate. 27 AD768 RFB 1k Ω IOUTA LADCOM IOUTB 75 Ω 24.9 Ω RP 20 Ω A1 C 3 IBIPOLAR RBIP 1k Ω REFOUT IDAC 28 1 Figure 25. Bipolar ±2.5 V Buffered Voltage Output DIFFERENTIAL OUTPUT CONFIGURATIONS AC Coupling via a Transformer Applications that do not require baseband operation typically use transformer coupling. Transformer coupling the comple- mentary outputs of the AD768 to a load has the inherent benefit of providing electrical isolation while consuming no additional power. Also, a properly applied transformer should not degrade the AD768’s output signal with respect to noise and distortion, since the transformer is a passive device. Figure 26 shows a center-tapped output transformer that provides the necessary dc load conditions at the outputs IOUTA and IOUTB to drive a ±0.5 V signal into a 50 Ω load. In this particular circuit, the cen- ter-tapped transformer has an impedance ratio of 4 that corre- sponds to a turns ratio of 2. Hence, any load, RL, referred to the primary side is multiplied by a factor of 4 (i.e., in this case 200 Ω). To avoid dc current from flowing into the R-2R ladder of the DAC, the center tap of the transformer should be con- nected to LADCOM. In order to comply with the minimum voltage compliance of –1.2 V, the maximum differential resistance seen between IOUTA and IOUTB should not exceed 240 Ω. Note that the differential resistance consists of the load RL, referred to the primary side of the transformer in parallel with any added differ- ential resistance, RDIFF, across the two outputs. RDIFF is typically added to the primary side of the transformer to match the effec- tive primary source impedance to the load (i.e., in this case 200 Ω). 1 27 AD768 IOUTA LADCOM IOUTB RDIFF 200 Ω T1 RL 50 Ω 4:1 IMPEDANCE RATIO T1 = MINI-CIRCUITS T4-6T 28 Figure 26. Differential Output Using a Transformer DC COUPLING VIA AN AMPLIFIER A dc differential to single-ended conversion can be easily ac- complished using the circuit shown in Figure 27. This circuit will attenuate both ac and dc common-mode error sources due to the differential nature of the circuit. Thus, common-mode noise (i.e., clock feedthrough) as well as dc unipolar offset errors will be significantly reduced. Also, excellent temperature stabil- ity can be obtained by using temperature tracking, thin film resistors for R and RREF. The design equations for the circuit are provided such that the voltage output swing and IREF can be optimized for a given application. 1 27 28 AD768 R* IOUTA LADCOM IOUTB RREF* IREF A1 R* 6 3 REFOUT REFIN VOUT VOUT = ±4 IREF R WHERE IREF = 2.5V RREF VOUT ± 2V R = 200 Ω RREF = 5 x 200Ω *OHMTEK TDP-1403 Figure 27. DC Differential to Single-Ended Conversion POWER AND GROUNDING CONSIDERATIONS In systems seeking to simultaneously achieve high speed and high accuracy, the implementation and construction of the printed circuit board design is often as important as the circuit design. Proper RF techniques must be used in device selection, placement and routing, and supply bypassing and grounding. Maintaining low noise on power supplies and ground is critical to obtaining optimum results from the AD768. Figure 28 pro- vides an illustration of the recommended printed circuit board ground plane layout which is implemented on the AD768 evalu- ation board. |
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