7.10

2

IDT54/74FCT273/A/C FAST CMOS

OCTAL D FLIP-FLOP WITH MASTER RESET

MILITARY AND COMMERCIAL TEMPERATURE RANGES

FUNCTION TABLE

Inputs

Outputs

Operating Mode

MR

MR

CP

Reset (Clear)

L

X

X

L

Load “1”

H

↑

hH

Load “0”

H

↑

lL

NOTES:

2558 tbl 06

H = HIGH voltage level steady-state

h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock

transition

L = LOW voltage level steady state

l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock

transition

X = Don’t care

↑ = LOW-to-HIGH clock transition

PIN DESCRIPTION

Pin Names

Description

Data Input

MR

Master Reset (Active LOW)

CP

Clock Pulse Input (Active Rising Edge)

Data Outputs

2558 tbl 05

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol

Rating

Commercial

Military

Unit

–0.5 to +7.0

–0.5 to +7.0

V

with Respect

to GND

V

with Respect

to GND

Operating

0 to +70

–55 to +125

°C

Temperature

Temperature

–55 to +125

–65 to +135

°C

Under Bias

Storage

–55 to +125

–65 to +150

°C

Temperature

Power Dissipation

0.5

0.5

W

DC Output Current

120

120

mA

NOTES:

2558 tbl 01

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or any other

conditions above those indicated in the operational sections of this

specification is not implied.

Exposure to absolute maximum rating

conditions for extended periods may affect reliability. No terminal voltage

3. Outputs and I/O terminals only.

°C, f = 1.0MHz)

Symbol

Parameter

(1)

Conditions Typ. Max.

Unit

Input Capacitance

6

10

pF

Output Capacitance

8

12

pF

NOTE:

2558 tbl 02

1. This parameter is guaranteed by characterization data and not tested.