7.21

6

IDT54/74FCT833A/B

FAST CMOS PARITY BUS TRANSCEIVER

MILITARY AND COMMERCIAL TEMPERATURE RANGES

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

IDT54/74FCT833A

IDT54/74FCT833B

Com’l.

Mil.

Com’l.

Mil.

Symbol

Parameter

Conditions

(1)

Min.

(2)

Max.

Min.

(2)

Max.

Min.

(2)

Max.

Min.

(2)

Max.

Unit

Propagation Delay

—

10.0

—

14.0

—

7.0

—

10.0

ns

(3)

—

17.5

—

21.5

—

14.5

—

17.5

Propagation Delay

—

15.0

—

20.0

—

10.5

—

14.0

ns

(3)

—

22.5

—

27.5

—

18.0

—

21.5

Output Enable Time

—

12.0

—

16.0

—

8.5

—

11.0

ns

(3)

—

19.5

—

23.5

—

16.0

—

18.5

(3)

—

10.7

—

14.7

—

7.2

—

9.8

ns

—

12.0

—

16.0

—

8.5

—

11.0

12.0

—

16.0

—

8.5

—

11.0

—

ns

Set-up Time

0

—

0

—

0

—

0

—

ns

Hold Time

Clear Recovery Time

15.0

—

20.0

—

10.5

—

14.0

—

ns

CLR to CLK

Clock Pulse Width

7.0

—

9.5

—

5.5

—

7.0

—

ns

HIGH or LOW

Clear Pulse Width

7.0

—

9.5

—

5.5

—

7.0

—

ns

LOW

Propagation Delay

—

12.0

—

16.0

—

8.5

—

11.0

ns

CLK to

ERR

Propagation Delay

—

16.0

—

20.0

—

15.0

—

18.0

ns

CLR to ERR

Propagation Delay

—

15.0

—

20.0

—

10.5

—

14.0

ns

(3)

—

22.5

—

27.5

—

18.0

—

21.5

NOTES:

2557 tbl 08

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. These parameters are guaranteed but not tested.