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IDT74FCT163244PV Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT74FCT163244PV Datasheet(HTML) 4 Page - Integrated Device Technology |
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4 / 6 page  8.1 4 IDT74FCT163244/A/C 3.3V 16-BIT BUFFER/LINE DRIVER COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS 2532 tbl 06 NOTES: 1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25 °C ambient. 3. Per TTL driven input; all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi SWITCHING CHARACTERISTICS OVER OPERATING RANGE (4) Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit ∆ICC Quiescent Power Supply Current VCC = Max. VIN = VCC – 0.6V(3) — 2.0 30 µA TTL Inputs HIGH ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open 50% Duty Cycle x OE = GND One Input Toggling VIN = VCC VIN = GND —50 75 µA/ MHz IC Total Power Supply Current(6) VCC = Max. VIN = VCC — 0.5 0.8 mA Outputs Open VIN = GND fi = 10MHz 50% Duty Cycle x OE = GND VIN = VCC –0.6V VIN = GND — 0.5 0.8 One Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz VIN = VCC VIN = GND — 2.0 3.0(5) 50% Duty Cycle x OE = GND Sixteen Bits Toggling VIN = VCC –0.6V VIN = GND — 2.0 3.3(5) FCT163244 FCT163244A FCT163244C Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit tPLH tPHL Propagation Delay xAx to xYx CL = 50pF RL = 500 Ω 1.5 6.5 1.5 4.8 1.5 4.1 ns tPZH tPZL Output Enable Time 1.5 8.0 1.5 6.2 1.5 5.8 ns tPHZ tPLZ Output Disable Time 1.5 7.0 1.5 5.6 1.5 5.2 ns tSK(o) Output Skew(3) — 0.5 — 0.5 — 0.5 ns 2532 tbl 07 NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 4. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. |
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