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IDT74FCT162511AT Datasheet(PDF) 5 Page - Integrated Device Technology |
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IDT74FCT162511AT Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 11 page IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY MILITARY AND COMMERCIAL TEMPERATURE RANGES 5.11 5 NOTE: 1. This parameter is measured at characterization but not tested. CAPACITANCE (TA = +25 °C, f = 1.0MHz) 2916 lnk 04 NOTES: 1. Conditions shown are for GEN/CHK = H, OEAB = L, OEBA = H. 2. A-to-B parity checking is shown. B-to-A parity checking is similar but uses OEBA = L, OEAB = H and errors will be indicated on PERA. 3. In parity checking mode the parity bits will be transmitted unchanged along with the corresponding data regardless of parity errors. (PB1 = PA1). 4. The response shown is for LEAB = H. If LEAB = L then CLKAB will control as an edge triggered clock. 5. Conditions shown are for the byte A0-A7 and PA1. The byte A8-A15 and PA2 is similiar. 6. The parity error flag PERB is a combined flag for both bytes A0-A7 and A8- A15. If a parity error occurs on either byte PERB will go low. PERB is an open drain output which must be externally pulled up to achieve a logic HIGH. FUNCTION TABLE (PARITY CHECKING) (1, 2, 3, 4) FUNCTION TABLE (PARITY GENERATION) (1, 2, 3, 4, 5) 2916 tbl 05 2916 tbl 06 NOTES: 1. Conditions shown are for GEN/CHK = L, OEAB = L, OEBA = H. 2. A-to-B parity checking is shown. B-to-A is capable of parity checking while A-to-B is performing generation. B-to-A will not generate parity. 3. The response shown is for LEAB = H. If LEAB = L then CLKAB will control as an edge triggered clock. 4. Conditions shown are for the byte A0-A7 . The byte A8-A15 is similiar but will output the parity on PB2. 5. The error flag PERB will remain in a high state during parity generation. Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3.5 6.0 pF CI/O I/O Capacitance VOUT = 0V 3.5 8.0 pF CO Open Drain Capacitance VOUT = 0V 3.5 6.0 pF A0 - A7, Total Number of inputs that are high ODD/ EVEN EVEN PB1 1, 3, 5 or 7 L H 1, 3, 5 or 7 H L 0, 2, 4, 6 or 8 L L 0, 2, 4, 6 or 8 H H A0 - A7 and PA1(5), Total Number of inputs that are high ODD/ EVEN EVEN PERB PERB 1, 3, 5, 7 or 9 L L 1, 3, 5, 7 or 9 H H(6) 0, 2, 4, 6 or 8 L H(6) 0, 2, 4, 6 or 8 H L |
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