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IDT74FCT162511AT Datasheet(PDF) 4 Page - Integrated Device Technology

Part No. IDT74FCT162511AT
Description  FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74FCT162511AT Datasheet(HTML) 4 Page - Integrated Device Technology

 
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IDT54/74FCT162511AT/CT
FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS
(1)
PIN DESCRIPTION
Pin Names
Description
OEAB
A-to-B Output Enable Input (Active LOW)
OEBA
B-to-A Output Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input
LEBA
B-to-A Latch Enable Input
CLKAB
A-to-B Clock Input
CLKBA
B-to-A Clock Input
Ax
A-to-B Data Inputs or B-to-A 3-State Outputs
Bx
B-to-A Data Inputs or A-to-B 3-State Outputs
PERA
Parity Error (Open Drain) on A Outputs
PERB
Parity Error (Open Drain) on B Outputs
PAx(1)
A-to-B Parity Input, B-to-A Parity Output
PBx
B-to-A Parity Input, A-to-B Parity Output
ODD/
EVEN
Parity Mode Selection Input
GEN/CHK
A to B Port Generate or Check Mode Input
2916 tbl 03
NOTES:
1. The PAx pin input is internally disabled during parity generation. This
means that when generating parity in the A to B direction there is no need
to add a pull up resistor to guarantee state. The pin will still function
properly as the parity output for the B to A direction.
Symbol
Description
Max.
Unit
VTERM(2) Terminal Voltage with Respect to
GND
–0.5 to +7.0
V
VTERM(3) Terminal Voltage with Respect to
GND
–0.5 to
VCC +0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–60 to +120
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. Open drain and all device terminals except FCT162XXXT Output and I/O
terminals.
3. Output and I/O terminals for FCT162XXXT.
2916 lnk 01
FUNCTION TABLE
(1,4)
Inputs
Outputs
OEAB
OEAB
LEAB
CLKAB
Ax
Bx
HX
X
X
Z
LH
X
L
L
LH
X
H
H
LL
LL
LL
HH
LL
L
X
B(2)
LL
H
X
B(3)
NOTES:
2916 tbl 02
1. A-to-B data flow is shown. B-to-A data flow is similar but uses
OEBA,
LEBA, and CLKBA.
2. Output level before the indicated steady-state input conditions were
established.
3. Output level before the indicated steady-state input conditions were
established, provided that CLKAB was HIGH before LEAB went LOW.
4. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
↑ = LOW-to-HIGH Transition


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