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IDT72511L40GB Datasheet(PDF) 7 Page - Integrated Device Technology

Part # IDT72511L40GB
Description  PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT72511L40GB Datasheet(HTML) 7 Page - Integrated Device Technology

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IDT72511/IDT72521
BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY
MILITARY AND COMMERCIAL TEMPERATURE RANGES
5.32
7
The Command Register is written by setting
CSA = 0, A1 =
1, A0 = 1. Commands written into the BiFIFO have a 4-bit
opcode (bit8 – bit 11) and a 3-bit operand (bit 0 – bit 2) as
shown in Figure 3. The commands can be used to reset the
BiFIFO, to select the Configuration Register, to perform intel-
ligent reread/rewrite, to set the Port B DMA direction, to set
the Status Register format, and to modify the Port B Read
and Write Pointers. The command opcodes are shown in
Table 2.
The reset command initializes different portions of the
BiFIFO depending on the command operand. Table 3 shows
the reset command operands.
The configuration Register address is set directly by the
COMMAND FORMAT
15
12
11
8
7
3
2
0
2668 tbl 02
Figure 3. Format for Commands Written into Port A
X
X
X
X
Command Opcode
X
X
X
X
X
Command Operand
command operands shown in Table 4.
Intelligent reread/rewrite is performed by interchanging
the Port B Read Pointer with the Reread Pointer or by
interchanging the Port B Write Pointer with the Rewrite Pointer.
No command operands are required to perform a reread/
rewrite operation.
When Port B of the BiFIFO is in peripheral mode, the DMA
direction is controlled by the Command Register. Table 5
shows the Port B read/write DMA direction operands.
Two commands are provided to increment the Port B Read
and Write Pointers. No operands are required for these
commands.


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