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IDT72V03L35J Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT72V03L35J Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 13 page 5.08 2 IDT72V01/72V02/72V03/72V04 3.3 VOLT CMOS ASYNCHRONOUS FIFO 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATIONS PLCC TOP VIEW SMALL OUTLINE PACKAGE TO BE DETERMINED RECOMMENDED DC OPERATING CONDITIONS Symbol Rating Min. Typ. Max. Unit VCC Supply Voltage 3.0 3.3 3.6 V GND Supply Voltage 0 0 0 V VIH (1) Input High Voltage 2.0 — VCC+0.5 V VIL (2) Input Low Voltage — — 0.8 V NOTE: 2679 tbl 03 1. VIH = 2.6V for XI input (commercial). 2. 1.5V undershoots are allowed for 10ns once per cycle. D2 5 D1 6 D0 7 XI 8 FF 9 Q0 10 Q1 11 NC 12 Q2 13 D6 D7 NC FL/RT RS EF XO/HF Q7 Q6 29 28 27 26 25 24 23 22 21 4 3 2 1 32 31 30 14 15 16 17 18 19 20 INDEX J32-1 2679 drw 02b ABSOLUTE MAXIMUM RATINGS (1) Symbol Rating Com’l. Unit VTERM Terminal Voltage –0.5 to +7.0 V with Respect to GND TA Operating 0 to +70 °C Temperature TBIAS Temperature –55 to +125 °C Under Bias TSTG Storage –55 to +125 °C Temperature IOUT DC Output 50 mA Current NOTE: 2679 tbl 01 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliabilty. CAPACITANCE (TA = +25 °C, f = 1.0 MHz) Symbol Parameter (1) Condition Max. Unit CIN Input Capacitance VIN = 0V 8 pF COUT Output Capacitance VOUT = 0V 8 pF NOTE: 2679 tbl 02 1. This parameter is sampled and not 100% tested. W D8 VCC D4 1 2 28 27 D3 D5 326 D2 D6 425 D1 D7 524 D0 FL/RT 623 XI RS 722 FF EF 821 Q0 XO/HF 920 Q1 Q7 10 19 Q2 Q6 11 18 Q3 Q5 12 17 Q8 Q4 13 16 GND R 14 15 2679 drw 02a |
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