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IDT72402L15P Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT72402L15P Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 9 page IDT72401, IDT72402, IDT72403, IDT72404 CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT MILITARY AND COMMERCIAL TEMPERATURE RANGES 5.01 7 2747 drw 12 SHIFT IN DATA OUTPUT OUTPUT READY DATA VALID (1) SHIFT OUT t OPH t SOR - tPT TIMING DIAGRAMS (Continued) HZOE t 2747 drw 14 OUTPUT ENABLE DATA OUT OOE t Figure 9. Output Enable Timing, IDT72403 and IDT72404 Only NOTE: 1. High-Z transitions are referenced to the steady-state VOH -500mV and VOL +500mV levels on the output. tHZOE is tested with 5pF load capacitance instead of 30pF as shown in Figure 1. 2747 drw 13 MASTER RESET DATA OUTPUT OUTPUT READY INPUT READY t MRS t MRIRH (1) (1) t MRW t MRORL SHIFT IN t MRQ NOTE: 1. Worst case, FIFO initially full.. Figure 8. Master Reset Timing NOTE: 1. FIFO initially empty. Figure 7. tPT and tOPH Specification |
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