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IDT7210L25J Datasheet(PDF) 5 Page - Integrated Device Technology |
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IDT7210L25J Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 10 page 11.2 5 IDT7210L 16 x 16 PARALLEL CMOS MULTIPLIER-ACCUMULATOR MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS (Commercial: VCC = 5.0V ± 10%, TA = 0°C to +70°C; Military: VCC = 5V ± 10%, TA = –55°C to +125°C) AC ELECTRICAL CHARACTERISTICS MILITARY (VCC = 5V ± 10%, TA = –55° to +125°C) NOTES: 2577 tbl 07 1. Transition is measured ±500mV from steady state voltage. 2. Minimum delays guaranteed but not tested NOTES: 2577 tbl 05 1. Typical implies VCC = 5V and TA = +25 °C. 2. ICC is measured at 10MHz and VIN = 0 to 3V. For frequencies greater than 10MHz, the following equation is used for the commercial range: ICC = 90+ 6(f –10)mA, where f = operating frequency in MHz. For the military range, ICC = 110 + 8(f –10). f = operating frequency in MHz, f = 1/tMA. 3. For frequencies greater than 10MHz, guaranteed by design, not production tested. 4. IOL = 4mA for tMA > 55ns. 5. For conditions shown as Max. or Min., use appropriate value specified under electrical characteristics. AC ELECTRICAL CHARACTERISTICS COMMERCIAL (VCC = 5V ± 10%, TA = 0° to +70°C) NOTES: 2577 tbl 06 1. Transition is measured ±500mV from steady state voltage. 2. Minimum delays guaranteed but not tested Commercial Military Symbol Parameter Test Conditions(5) Min. Typ.(1) Max. Min. Typ.(1) Max. Unit VIH Input High Voltage Guaranteed Logic HIGH Level 2.0 — — 2.0 — — V VIL Input Low Voltage Guaranteed Logic LOW Level — — 0.8 — — 0.8 V |ILI| Input Leakage Current VCC = Max., VIN = 0V to VCC ——10 ——10 µA |ILO| Output Leakage Current VCC = Max., Outputs Disabled VOUT = 0 to VCC ——10 ——10 µA VOH Output HIGH Voltage VCC = Min., IOH = –2.0mA 2.4 — — 2.4 — — V VOL(4) Output LOW Voltage VCC = Min., IOL = 4mA — — 0.4 — — 0.4 V IOS Output Short Circuit Current VCC = Max., V0 GND -20 — -100 -20 — -100 mA ICC(2) Operating Power Supply Current VCC = Max., Outputs Enabled f= 10MHz(2) CL = 50 pF — 45 90 — 45 110 mA ICCQ1 Quiescent Power Supply Current VIN ≥ VIH, VIN ≤ VIL — 20 30 — 20 30 mA ICCQ2 Quiescent Power Supply Current VIN ≥ VCC –0.2V, V IN ≤ 0.2V — 4 10 — 4 12 mA ICC/f(2,3) Increase in Power Supply Current MHz VCC = Max., Outputs Disabled — — 6 — — 8 mA/ MHz 7210L25 7210L30 7210L40 7210L55 7210L65 7210L75 Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit tMA Multiply-Accumulate Time(2) 2.0 25 2.0 30 2.0 40 2.0 55 2.0 65 2.0 75 ns tD Output Delay(2) 2.0 20 2.0 20 2.0 25 2.0 30 2.0 35 2.0 35 ns tENA 3-State Enable Time — 20 – 20 – 25 – 30 – 30 – 35 ns tDIS 3-State Disable Time(1) — 20 – 20 – 25 – 25 – 30 – 30 ns tS Input Register Set-up Time 12 — 12 – 15 – 20 – 25 – 25 – ns tH Input Register Hold Time 3 — 3–3–3–3–3 –ns tPW Clock Pulse Width 10 — 10 – 15 – 20 – 25 – 25 – ns tHCL Relative Hold Time 0 — 0–0–0–0–0 –ns 7210L20 7210L25 7210L35 7210L45 7210L55 7210L65 Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit tMA Multiply-Accumulate Time(2) 2.0 20 2.0 25 2.0 35 2.0 45 2.0 55 2.0 65 ns tD Output Delay(2) 2.0 18 2.0 20 2.0 25 2.0 25 2.0 30 2.0 35 ns tENA 3-State Enable Time — 18 – 20 – 25 – 25 – 30 – 30 ns tDIS 3-State Disable Time(1) — 18 – 20 – 25 – 25 – 30 – 30 ns tS Input Register Set-up Time 10 — 12 – 12 – 15 – 20 – 25 – ns tH Input Register Hold Time 3 — 3–3–3–3–3 –ns tPW Clock Pulse Width 9 — 10 – 10 – 15 – 20 – 25 – ns tHCL Relative Hold Time 0 — 0–0–0–0–0 –ns |
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