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IDT7200L Datasheet(PDF) 4 Page - Integrated Device Technology

Part No. IDT7200L
Description  CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1,024 x 9
Download  13 Pages
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT7200L Datasheet(HTML) 4 Page - Integrated Device Technology

 
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IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS(1)
(Commercial: VCC = 5V
±10%, TA = 0°C to +70°C; Industrial: VCC = 5V ±10%, TA = –40°C to +85°C; Military: VCC = 5V ±10%, TA = –55°C to +125°C)
Commercial
Com'l & Mil. Com'l & Ind'l
(2)
Military
Com'l
7200L12
7200L15
7200L20
7200L25
7200L30
7200L35
7201LA12 7201LA15
7201LA20
7201LA25
7201LA30 7201LA35
7202LA12 7202LA15
7202LA20
7202LA25
7202LA30 7202LA35
Symbol
Parameter
Min. Max. Min. Max.
Min.
Max.
Min.
Max.
Min. Max. Min. Max. Unit
tS
Shift Frequency
50
40
33.3
28.5
25
22.2 MHz
tRC
Read Cycle Time
20
25
30
35
40
45
ns
tA
Access Time
12
15
20
25
30
35
ns
tRR
Read Recovery Time
8
10
10
10
10
10
ns
tRPW
Read Pulse Width
(3)
12
15
20
25
30
35
ns
tRLZ
Read Pulse Low to Data Bus at Low Z
(4)
3
5—
5
5
5—
5
ns
tWLZ
Write Pulse High to Data Bus at Low Z
(4,5)
3
5—
5
5
5—
10
ns
tDV
Data Valid from Read Pulse High
5
5
5
5
5
5
ns
tRHZ
Read Pulse High to Data Bus at High Z
(4)
12
15
15
18
20
20
ns
tWC
Write Cycle Time
20
25
30
35
40
45
ns
tWPW
Write Pulse Width
(3)
12
15
20
25
30
35
ns
tWR
Write Recovery Time
8
10
10
10
10
10
ns
tDS
Data Set-up Time
9
11
12
15
18
18
ns
tDH
Data Hold Time
0
0
0
0
0
0
ns
tRSC
Reset Cycle Time
20
25
30
35
40
45
ns
tRS
Reset Pulse Width
(3)
12
15
20
25
30
35
ns
tRSS
Reset Set-up Time
(4)
12
15
20
25
30
35
ns
tRSR
Reset Recovery Time
8
10
10
10
10
10
ns
tRTC
Retransmit Cycle Time
20
25
30
35
40
45
ns
tRT
Retransmit Pulse Width
(3)
12
15
20
25
30
35
ns
tRTS
Retransmit Set-up Time
(4)
12
15
20
25
30
35
ns
tRTR
Retransmit Recovery Time
8
10
10
10
10
10
ns
tEFL
Reset to Empty Flag Low
12
25
30
35
40
45
ns
tHFH,FFH Reset to Half-Full and Full Flag High
17
25
30
35
40
45
ns
tRTF
Retransmit Low to Flags Valid
20
25
30
35
40
45
ns
tREF
Read Low to Empty Flag Low
12
15
20
25
30
30
ns
tRFF
Read High to Full Flag High
14
15
20
25
30
30
ns
tRPE
Read Pulse Width after
EF High
12
15
20
25
30
35
ns
tWEF
Write High to Empty Flag High
12
15
20
25
30
30
ns
tWFF
Write Low to Full Flag Low
14
15
20
25
30
30
ns
tWHF
Write Low to Half-Full Flag Low
17
25
30
35
40
45
ns
tRHF
Read High to Half-Full Flag High
17
25
30
35
40
45
ns
tWPF
Write Pulse Width after
FF High
12
15
20
25
30
35
ns
tXOL
Read/Write to
XO Low
12
15
20
25
30
35
ns
tXOH
Read/Write to
XO High
12
15
20
25
30
35
ns
tXI
XI Pulse Width(3)
12
15
20
25
30
35
ns
tXIR
XI Recovery Time
8
10
10
10
10
10
ns
tXIS
XI Set-up Time
8
10
10
10
10
10
ns
NOTES:
2679 tbl 06
1. Timings referenced as in AC Test Conditions.
3. Pulse widths less than minimum value are not allowed.
2. Industrial temperature range is available by special order for
4. Values guaranteed by design, not currently tested.
speed grades faster than 25ns.
5. Only applies to read data flow-through mode.


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