6.42

5

IDT71V428S, IDT71V428L, 3.3V CMOS Static RAM

4 Meg (1M x 4-Bit)

Commercial and Industrial Temperature Ranges

NOTES:

1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.

2. 0

°C to +70°C temperature range only for low power 10ns (L10) speed grade.

71V428S/L10

(2)

71V428S/L12

71V428S/L15

Symbol

Parameter

Min.Max.Min.Max.Min.Max.

Unit

READ CYCLE

Read Cycle Time

10

____

12

____

15

____

ns

Address Access Time

____

10

____

12

____

15

ns

Chip Select Access Time

____

10

____

12

____

15

ns

Chip Select to Output in Low-Z

4

____

4

____

4

____

ns

Chip Deselect to Output in High-Z

____

5

____

6

____

7ns

Output Enable to Output Valid

____

5

____

6

____

7ns

(1)

Output Enable to Output in Low-Z

0

____

0

____

0

____

ns

Output Disable to Output in High-Z

____

5

____

6

____

7ns

Output Hold from Address Change

4

____

4

____

4

____

ns

(1)

Chip Select to Power Up Time

0

____

0

____

0

____

ns

Chip Deselect to Power Down Time

____

10

____

12

____

15

ns

WRITE CYCLE

Write Cycle Time

10

____

12

____

15

____

ns

Address Valid to End of Write

8

____

8

____

10

____

ns

Chip Select to End of Write

8

____

8

____

10

____

ns

Address Set-up Time

0

____

0

____

0

____

ns

Write Pulse Width

8

____

8

____

10

____

ns

Write Recovery Time

0

____

0

____

0

____

ns

Data Valid to End of Write

6

____

6

____

7

____

ns

Data Hold Time

0

____

0

____

0

____

ns

Output Active from End of Write

3

____

3

____

3

____

ns

Write Enable to Output in High-Z

____

6

____

7

____

7ns

3623 tbl 10