4

IDT7188S/L

CMOS Static RAM 64K (16K x 4-Bit)

Military Temperature Range

Data Retention Characteristics

AC Test Conditions

Figure 1. AC Test Load

Figure 2. AC Test Load

*Includes scope and jig capacitances

2989 drw 03

DATA

RETENTION

MODE

4.5V

4.5V

≥ 2V

CS

,

2989 drw 04

480

Ω

30pF*

255

Ω

5V

,

2989 drw 05

480

Ω

5pF*

255

Ω

5V

,

NOTES:

3. This parameter is guaranteed by device characterization but is not production tested.

Typ.

(1)

Max.

Symbol

Parameter

Test

Condition

Min.

2.0V

3.0V

2.0V

3.0V

Unit

____

2.0

____

____

____

____

V

Data Retention Current

____

10

15

600

900

µA

(3)

Chip Deselect to Data Retention Time

0

____

____

____

____

ns

(3)

Operation Recovery Time

(2)

____

____

____

____

ns

Input Leakage Current

____

____

____

2

2

µA

2989 tbl 09

Input Pulse Levels

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

AC Test Load

GND to 3.0V

5ns

1.5V

1.5V

See Figures 1 and 2

2989 tbl 10