Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

IDT7015S Datasheet(PDF) 18 Page - Integrated Device Technology

Part No. IDT7015S
Description  HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
Download  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT7015S Datasheet(HTML) 18 Page - Integrated Device Technology

Back Button IDT7015S Datasheet HTML 12Page - Integrated Device Technology IDT7015S Datasheet HTML 13Page - Integrated Device Technology IDT7015S Datasheet HTML 14Page - Integrated Device Technology IDT7015S Datasheet HTML 15Page - Integrated Device Technology IDT7015S Datasheet HTML 16Page - Integrated Device Technology IDT7015S Datasheet HTML 17Page - Integrated Device Technology IDT7015S Datasheet HTML 18Page - Integrated Device Technology IDT7015S Datasheet HTML 19Page - Integrated Device Technology IDT7015S Datasheet HTML 20Page - Integrated Device Technology  
Zoom Inzoom in Zoom Outzoom out
 18 / 20 page
background image
6.12
18
IDT7015S/L
HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
until the semaphore is freed by the first side.
When a semaphore flag is read, its value is spread into all
data bits so that a flag that is a one reads as a one in all data
bits and a flag containing a zero reads as all zeros. The read
value is latched into one side’s output register when that side's
semaphore select (
SEM) and output enable (OE) signals go
active. This serves to disallow the semaphore from changing
state in the middle of a read cycle due to a write cycle from the
other side.
Because of this latch, a repeated read of a
semaphore in a test loop must cause either signal (
SEM or OE)
to go inactive or the output will never change.
A sequence WRITE/READ must be used by the sema-
phore in order to guarantee that no system level contention
will occur. A processor requests access to shared resources
by attempting to write a zero into a semaphore location. If the
semaphore is already in use, the semaphore request latch will
contain a zero, yet the semaphore flag will appear as one, a
fact which the processor will verify by the subsequent read
(see Table III). As an example, assume a processor writes a
zero to the left port at a free semaphore location. On a
subsequent read, the processor will verify that it has written
successfully to that location and will assume control over the
resource in question. Meanwhile, if a processor on the right
side attempts to write a zero to the same semaphore flag it will
fail, as will be verified by the fact that a one will be read from
that semaphore on the right side during subsequent read.
Had a sequence of READ/WRITE been used instead, system
contention problems could have occurred during the gap
between the read and write cycles.
It is important to note that a failed semaphore request must
be followed by either repeated reads or by writing a one into
the same location. The reason for this is easily understood by
looking at the simple logic diagram of the semaphore flag in
Figure 4. Two semaphore request latches feed into a sema-
phore flag. Whichever latch is first to present a zero to the
semaphore flag will force its side of the semaphore flag low
and the other side high. This condition will continue until a one
is written to the same semaphore request latch. Should the
other side’s semaphore request latch have been written to a
zero in the meantime, the semaphore flag will flip over to the
other side as soon as a one is written into the first side’s
request latch. The second side’s flag will now stay low until its
semaphore request latch is written to a one. From this it is
easy to understand that, if a semaphore is requested and the
processor which requested it no longer needs the resource,
the entire system can hang up until a one is written into that
semaphore request latch.
The critical case of semaphore timing is when both sides
request a single token by attempting to write a zero into it at
the same time. The semaphore logic is specially designed to
resolve this problem. If simultaneous requests are made, the
logic guarantees that only one side receives the token. If one
side is earlier than the other in making the request, the first
side to make the request will receive the token.
If both
requests arrive at the same time, the assignment will be
arbitrarily made to one port or the other.
One caution that should be noted when using semaphores
is that semaphores alone do not guarantee that access to a
Software handshaking between processors offers the
maximum in system flexibility by permitting shared resources
to be allocated in varying configurations. The IDT7015 does
not use its semaphore flags to control any resources through
hardware, thus allowing the system designer total flexibility in
system architecture.
An advantage of using semaphores rather than the more
common methods of hardware arbitration is that wait states
are never incurred in either processor. This can prove to be
a major advantage in very high-speed systems.
HOW THE SEMAPHORE FLAGS WORK
The semaphore logic is a set of eight latches which are
independent of the Dual-Port RAM. These latches can be
used to pass a flag, or token, from one port to the other to
indicate that a shared resource is in use. The semaphores
provide a hardware assist for a use assignment method called
“Token Passing Allocation.” In this method, the state of a
semaphore latch is used as a token indicating that shared
resource is in use. If the left processor wants to use this
resource, it requests the token by setting the latch. This
processor then verifies its success in setting the latch by
reading it. If it was successful, it proceeds to assume control
over the shared resource. If it was not successful in setting the
latch, it determines that the right side processor has set the
latch first, has the token and is using the shared resource. The
left processor can then either repeatedly request that
semaphore’s status or remove its request for that semaphore
to perform another task and occasionally attempt again to
gain control of the token via the set and test sequence. Once
the right side has relinquished the token, the left side should
succeed in gaining control.
The semaphore flags are active low. A token is requested
by writing a zero into a semaphore latch and is released when
the same side writes a one to that latch.
The eight semaphore flags reside within the IDT7015 in a
separate memory space from the Dual-Port RAM. This
address space is accessed by placing a low input on the
SEM
pin (which acts as a chip select for the semaphore flags) and
using the other control pins (Address,
OE, and R/W) as they
would be used in accessing a standard static RAM. Each of
the flags has a unique address which can be accessed by
either side through address pins A0 – A2. When accessing the
semaphores, none of the other address pins has any effect.
When writing to a semaphore, only data pin D0 is used. If
a low level is written into an unused semaphore location, that
flag will be set to a zero on that side and a one on the other side
(see Table III). That semaphore can now only be modified by
the side showing the zero. When a one is written into the same
location from the same side, the flag will be set to a one for both
sides (unless a semaphore request from the other side is
pending) and then can be written to by both sides. The fact
that the side which is able to write a zero into a semaphore
subsequently locks out writes from the other side is what
makes semaphore flags useful in interprocessor communica-
tions. (A thorough discussing on the use of this feature follows
shortly.) A zero written into the same location from the other
side will be stored in the semaphore request latch for that side


Similar Part No. - IDT7015S

ManufacturerPart No.DatasheetDescription
Integrated Device Technology
Integrated Device Techn...
IDT7015S IDT-IDT7015S Datasheet
165Kb / 20P
   HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S IDT-IDT7015S Datasheet
190Kb / 21P
   HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S IDT-IDT7015S Datasheet
190Kb / 21P
   HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S12G IDT-IDT7015S12G Datasheet
165Kb / 20P
   HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S12GB IDT-IDT7015S12GB Datasheet
165Kb / 20P
   HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
More results

Similar Description - IDT7015S

ManufacturerPart No.DatasheetDescription
Integrated Device Technology
Integrated Device Techn...
IDT7015S IDT-IDT7015S_16 Datasheet
190Kb / 21P
   HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S IDT-IDT7015S_17 Datasheet
190Kb / 21P
   HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S IDT-IDT7015S_06 Datasheet
165Kb / 20P
   HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT70V16 IDT-IDT70V16 Datasheet
168Kb / 18P
   HIGH-SPEED 3.3V 16/8K X 9 DUAL-PORT STATIC RAM
IDT70T16 IDT-IDT70T16 Datasheet
158Kb / 18P
   HIGH-SPEED 2.5V 16/8K X 9 DUAL-PORT STATIC RAM
IDT7035S IDT-IDT7035S_15 Datasheet
672Kb / 19P
   HIGH-SPEED 8K x 18 DUAL-PORT STATIC RAM
IDT7025S IDT-IDT7025S Datasheet
294Kb / 20P
   HIGH-SPEED 8K x 16 DUAL-PORT STATIC RAM
IDT7025L15PFG IDT-IDT7025L15PFG Datasheet
192Kb / 22P
   HIGH-SPEED 8K x 16 DUAL-PORT STATIC RAM
IDT7005S IDT-IDT7005S_16 Datasheet
733Kb / 21P
   HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
IDT7005S IDT-IDT7005S Datasheet
265Kb / 20P
   HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
More results


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz