 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
IDT6116SA25TDB Datasheet(PDF) 7 Page - Integrated Device Technology |
|
||||||||||||||||||||||||||||||
IDT6116SA25TDB Datasheet(HTML) 7 Page - Integrated Device Technology |
|
|
7 / 11 page  6.42 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges 7 Timing Waveform of Read Cycle No. 2(1,2,4) Timing Waveform of Read Cycle No. 1(1,3) Timing Waveform of Read Cycle No. 3(1,3,4) NOTES: 1. WE is HIGH for Read cycle. 2. Device is continously selected, CS is LOW. 3. Address valid prior to or coincident with CS transition LOW. 4. OE is LOW. 5. Transition is measured ±500mV from steady state. ADDRESS OE CS tRC tAA tOE tACS DATAOUT tOH tOLZ (5) tCLZ (5) tOHZ (5) tCHZ (5) 3089 drw 06 DATA VALID tPD ICC ISB tPU VCC Supply Currents , ADDRESS tRC tAA tOH tOH DATAOUT 3089 drw 07 PREVIOUS DATA VALID DATA VALID , CS tACS DATAOUT tCLZ (5) tCHZ (5) DATA VALID 3089 drw 08 , |
Similar Part No. - IDT6116SA25TDB |
|
Similar Description - IDT6116SA25TDB |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
