11.6

7

IDT49C460/A/B/C/D/E

32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT

MILITARY AND COMMERCIAL TEMPERATURE RANGES

DETAILED PRODUCT DESCRIPTION

The IDT49C460 EDC units contain the logic necessary to

generate check bits on 32 bits of data input according to a

modified Hamming Code. The EDC can compare internally

generated check bits against those read with the 32-bit data

to allow correction of any single bit data error and detection of

all double (and some triple) bit errors. The IDT49C460s can

be used for 32-bit data words (7 check bits) and 64-bit (8 check

bits) data words.

WORD SIZE SELECTION

determine the data word size that is 32 or 64 bits. They also

select the Internal Control Mode. Table 4 defines all possible

slice identification codes.

CHECK AND SYNDROME BITS

The IDT49C460s provide either check bits or syndrome

generated from a combination of the Data Input bits, while

syndrome bits are an exclusive-OR of the check bits gener-

ated from read data with the read check bits stored with the

data. Syndrome bits can be decoded to determine the single

bit in error or that a double (some triple) error was detected.

The check bits are labeled:

for the 32-bit configuration

for the 64-bit configuration

2584 tbl 02

Table 2. Diagnostic Mode Control

NOTES:

2584 tbl 03

1. In Generate Mode, data is read into the EDC unit and the check bits are generated. The same data is written to memory along with the check bits. Since

2. Error Dep (Error Dependent):

ERROR will be low for single or multiple errors, with MULT ERROR low for double or multiple errors. Both signals are high

for no errors.

Table 3. IDT49C460 Operating Modes

Correct

Diag

Diag

Diagnostic Mode Selected

X0

0

Non-diagnostic Mode.

Normal

EDC function in this mode.

X0

1

Diagnostic Generate.

The con

tents of the Diagnostic Latch are

substituted

for

the

normally

generated check bits when in the

Generate

Mode.

The

EDC

functions normally in the Detect or

Correct modes.

0/1

1

0

Diagnostic Detect/Correct.

In

either mode, the contents of the

Diagnostic Latch are substituted

for the check bits normally read

from the Check Bit Input Latch.

The EDC functions normally in the

Generate Mode.

11

1

Initialize.

The Data Input Latch

outputs are forced to zeros and

latched upon removal of Initialize

Mode.

01

1

PASSTHRU.

Operating

Mode

Generate

Correct

(

OE

ERROR

ERROR

MULT ERROR

MULT ERROR

Generate

0

1

0

0

0X

Check Bits Generated from

High

Detect

0

0

0

1

1

0

Check Bit Latch

Correct

0

0

0

1

1

1

Single Bit Correction

Check Bit Latch

Error Dep

PASSTHRU

1

1

1

0

Check Bit Latch

High

Diagnostic

Generate

0

1

0

X

—

Check Bits from Diagnostic Latch

High

Diagnostic Detect

1

0

1

0

Diagnostic Latch

Error Dep

Diagnostic Correct

1

0

1

1

Single Bit Correction

Diagnostic Latch

Error Dep

Initialization

1

1

1

1

——

Internal