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IDT49C466 Datasheet(PDF) 1 Page - Integrated Device Technology

Part No. IDT49C466
Description  64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT49C466 Datasheet(HTML) 1 Page - Integrated Device Technology

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Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
©1996 Integrated Device Technology, Inc.
11.7
DSC-2617/9
64-BIT FLOW-THRU
ERROR DETECTION
AND CORRECTION UNIT
The IDT logo is a registered trademark and Flow-thruEDC is a trademark of Integrated Device Technology Inc.
FEATURES:
• 64-bit wide Flow-thruEDC
• Separate System and Memory Data Input/Output Buses
• — Error Detect Time: 10ns
— Error Correct Time: 15ns
• Corrects all single bit errors; Detects all double bit errors
and some multiple bit errors
• Configurable 16-deep bus read/write FIFOs with flags
• Simultaneous check bit generation and correction of memory
data
• Supports partial word writes on byte boundaries
• Low noise output
• Sophisticated error diagnostics and error logging
• Parity generation on system data bus
• 208-pin Plastic Quad Flatpack
2617 drw 01
SD
CHK-BIT
LATCH
WRITE
BUFFER
16 WORDS BY
72
SD
LATCH
IN
MD
LATCH
OUT
READ BUFFER
16 WORDS BY
64
MD
LATCH
IN
SD
LATCH
OUT
ERROR
CORRECT
CHECK-BIT
COMPARATOR &
SYNDROME
GENERATOR &
ERROR
DETECTOR
SD
CHECK-BIT
GENERATOR
MD
CHECK-BIT
GENERATOR
B
Y
T
E
M
U
X
MD
CHK-BIT
LATCH
WRITE BACK PATH
DIAGNOSTIC
& STATUS
REGISTERS
PARITY
GENERATE &
PARITY CHECK
PARITY
SD0-63
ERR
MERR
MD0-63
M
U
X
M
U
X
M
U
X
P0-7
CBI0-7
CBSYN0-7
1
IDT49C466
IDT49C466A
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The IDT49C466/A 64-bit Flow-thruEDC is a high-speed
error detection and correction unit that ensures data integrity
in memory systems. The flow-thru architecture, with separate
system and memory data buses, is ideally suited for pipelined
memory systems.
Implementing
a
modified
Hamming
code,
the
IDT49C466/A corrects all single bit hard and soft errors, and
detects all double bit errors. The read/write FIFOs can store
up to sixteen words.
FIFO full and empty flags indicate
whether additional data can be written to or read from the
EDC.
Check bit generation for partial word writes on byte bound-
aries is supported on the IDT49C466/A.
Diagnostic features include a check bit register, syndrome
registers, a four bit error counter which logs up to 15 errors,
and an error data register which stores the complete error data
word. Parity can be generated and checked on the system
bus by the IDT49C466/A.


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