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IDT49C465 Datasheet(PDF) 10 Page - Integrated Device Technology

Part No. IDT49C465
Description  32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT49C465 Datasheet(HTML) 10 Page - Integrated Device Technology

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11.7
10
IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OPERATING MODE CHARTS
SLICE IDENTIFICATION
CODE ID 1
CODE ID 0
Slice Definition
0
0
32-bit Flow-Thru EDC
0
1
64-bit GENERATE Only EDC
1
0
64-bit EDC- Lower 32 bits (0-31)
1
1
64-bit EDC- Upper 32 bits (32-63)
2552 tbl 04
SLICE POSITION CONTROL
Checkbit Buses
Slice Position/
CODE Functional Operation
PCBI
CBI
CBO
SYO
P
ID
SOE
SOE SD Bus MOE
MOE
MD Bus
Bus
Bus
Bus
Bus
Bus
PERR
PERR
1 0
Width =
32
32
8
8
8
8
4
1
0 0
Single 32-bit EDC unit
Generate
(1)
1
Sys. 0–31
0
Sys. Byte Mux
CBs out
P in
active
Detect/Correct
(2)
0
Pipe. latch
1
MD 0–31
CBs in
Syn. out
P out
0 1
“64-bit Generate-only”
1
Sys. 32–63
1
Sys. 0–31
CBs out
1 0
Lower word, 64-bit bus
Generate
(1)
1
Sys. 0–31
0
MD 0–31
PCBs out
P in
active
Detect/Correct
(2)
0
Pipe. latch
1
MD 0–31
U-SYOout
CBs in
Par.Synd P out
1 1
Upper word, 64-bit bus
Generate
(1)
1
Sys. 32–63
0
MD 32–63
L-CBOout
F.CBs out
P in
active
Detect/Correct
(2)
0
Pipe. latch
1
MD 32–63
L-SYOout
Par.Cbits P out
NOTES:
2552 tbl 05
1. Checkbits generated from the data in the SD Latch.
2. Corrected data residing in the Pipe Latch.
PCBI
CBI
CBO
SYO
P
FUNCTIONAL MODE CONTROL
Checkbit Buses
Functional Mode
of SD Bus
PCBI
CBI
CBO
SYO
P
MODE
SOE
SOE
SD Bus
MOE
MOE MD Bus
Bus
Bus
Bus
Bus
Bus
PERR
PERR
2 1 0
Width =
32
32
8
8
8
8
4
1
x1 1
“Normal”
Generate
1
CPU Data
0
Pipe. latch
CB out
P in
active
Correct
0
Pipe. latch
1
RAM Data
CB in
P out
x1 0
“Generate-Detect”
Generate
1
CPU Data
0
Pipe. latch
CB out
P in
active
Detect
0
Pipe. latch
1
RAM Data
CB in
P out
000
“Error-Data-Output”
0
Err. D. latch
x0 1
“Diagnostic-Output”
0
CBin latch
PCBI in
CB in
PCBIin bus
Syn. register
Err. counter
Er. type reg.
100
“Checkbit-Injection”
Generate
1
SDin latch
0
Pipe. latch
CB out
P in
active
Inject Checkbits
1
SD0–7 in
0
Pipe. latch
Correct
0
Pipe. latch
1
RAM Data
CB in
P out
2552 tbl 06


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