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IDT49C465 Datasheet(PDF) 32 Page - Integrated Device Technology

Part No. IDT49C465
Description  32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT49C465 Datasheet(HTML) 32 Page - Integrated Device Technology

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11.7
32
IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC TIMING DIAGRAMS — 64-BIT CONFIGURATION
NOTE:
2552 drw 23
1. Assumes that System Data is valid at least 3ns (Com.)/4ns (Mil.) before SLE goes HIGH.
Figure 11. 64-Bit Detect Timing
t CMLH
MLE
MD (L)
MOE
min.
Parameter
Name
Propagation Delay
From
To
Min./
Max.
(OUTPUT)
CBI
Valid Checkbits In
t CMLS
t MMLH
t MMLS
t MEMxZ
t MLS
t CMLH
t CMLS
t MMLH
t MMLS
t MEMxZ
CBI Hold to MLE = Low
CBI Set-up to MLE = Low
MDIN Hold to MLE = Low
MDIN Set-up to MLE = Low
MOE = High to MDOUT
Disabled
min.
min.
min.
max.
t BESZx
t SESZx
Corrected DATAOUT
Partial Syndrome Out
t MLS
t BESZx
t SESZx
MLE = High to SDOUT
BEN = High to SDOUT Enabled
SOE = Low to SDOUT Enabled
max.
max.
max.
BEN
SOE
SD0–31
SYO
MD (U)
(OUTPUT)
t MSY
t CSY
t MLSY
t CME
t MLME
t CE
t MLE
t MME
t ME
3
LOWER 465
UPPER 465
Partial Syndrome In
t MSY
t CSY
t MLSY
t CME
t MLME
t CE
t MLE
t MME
t ME
MD Lower In to SYOOUT
CBI to SYO
MLE = High to SYO
CBI to MERR
MLE = High to MERR
CBI to ERR
MLE = High to ERR
MDIN to MERR
MDIN to ERR
Inter-chip delay (Design dependent)
max.
max.
max.
max.
max.
max.
max.
max.
max.
CBI
MERR
ERR
BOTH
465s
to
1
2
3
4
5
to
1
2
3
4
5
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Valid DATAIN
Valid DATAIN


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