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IDT49C465 Datasheet(PDF) 19 Page - Integrated Device Technology

Part No. IDT49C465
Description  32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT49C465 Datasheet(HTML) 19 Page - Integrated Device Technology

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11.7
19
IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DETAILED DESCRIPTION — 64-BIT CONFIGURATION (Con’t.)
64-BIT SYNDROME DECODE TO BIT-IN-ERROR
(1)
HEX
0123456789
A
B
C
D
E
F
S7
00000000111
11111
S6
00001111000
01111
Syndrome
S5
00110011001
10011
Bits
S4
01010101010
10101
HEX
S3
S2
S1
S0
0
0000
*
C4
C5
T
C6
T
T
62
C7
T
T
46
T
M
M
1
0001
C0
T
T
14
T
M
M
T
T
M
M
T
M
T
T
2
0010
C1
T
T
M
T
34
56
T
T
50
40
T
M
T
T
3
0011
T
18
8
T
M
T
T
M
M
T
T
M
T
2
24
4
0100
C2
T
T
15
T
35
57
T
T
51
41
T
M
T
T
5
0101
T
19
9
T
M
T
T
63
M
T
T
47
T
3
25
6
0110
T
20
10
T
M
T
T
M
M
T
T
M
T
4
26
7
0111
M
T
T
M
T
36
58
T
T
52
42
T
M
T
T
8
1000
C3
T
T
M
T
37
59
T
T
53
43
T
M
T
T
9
1001
T
21
11
T
M
T
T
M
M
T
T
M
T
5
27
A
1010
T
22
12
T
33
T
T
M
49
T
T
M
T
6
28
B
1011
17
T
T
M
T
38
60
T
T
54
44
T
1
T
T
C
1100
T
23
13
T
M
T
T
M
M
T
T
M
T
7
29
D
1101
M
T
T
M
T
39
61
T
T
55
45
T
M
T
T
E
1110
16
T
T
M
T
M
M
T
T
M
M
T
0
T
T
F1111
T
M
M
T
32
T
T
M
48
T
T
M
T
M
M
NOTES:
2552 tbl 17
1. The table indicates the decoding of the seven syndrome bits to identify the bit-in-error for a single-bit error, or whether a double or triple-bit error was
detected. The all-zero case indicates no error detected.
* = No errors detected
# = The number of the single bit-in-error
T = Two errors detected
M = Three or more detected
T
30
M
T
31
T
T
M
M
T
T
M
T
M
M
T
KEY AC CALCULATIONS — 64-BIT CASCADED CONFIGURATION
64-Bit Propagation Delay
Total AC Delay for IDT49C465 in 64-bit Mode
(L) = Lower slice
Mode
From
To
(U) = Upper slice
Generate
SD Bus
Checkbits out
SD to CBO(L)
+
PCBI to CBO(U)
t SC(L)
+
t PCC(U)
Detect
MD Bus
ERR for 64-bits
MD to SYO(L)
+
CBI to
ERR (U)
t MSY(L)
+
t CE (U)
MD Bus
MERR for 64-bits
MD to SYO(L)
+
CBI to
M ERR
t MSY(L)
+
t CME (
U)
Correct
MD Bus
Corrected data out
MD to SYO(L)
+
CBI to SD(U)
t MSY(L)
+
t CS (U)
(or)
→ MD to SYO(U) + PCBI to SD(L)
t MSY(U)
+
t PCS(L)
NOTE:
2552 tbl 18
1. (or) = Whichever is worse.


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